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Current and common processing units are 8, 16, 32, 64, 128, etc bit. Why are their datapath multiple of 8 ? Is this all linked to the fact that the industry has settled with a 8-bit byte ?

The PDP-7 was 18-bit. Pentium Pro address bus was 36-bit. Many amd64 processors only implement 56-bit address space.

Is it a bad design ? Are there any drawback to datapaths or address space that are not a power of 2 (8 being 2**3) ?

blunova
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Benoît
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    Possible duplicate of [What is the history of why bytes are eight bits?](https://softwareengineering.stackexchange.com/questions/120126/what-is-the-history-of-why-bytes-are-eight-bits) – gnat Apr 29 '17 at 20:04
  • No it's not a duplicate. You could even arg that Pentium Pro address bus was 36-bit and that canonical amd64 address space is 56-bit. – Benoît Apr 29 '17 at 20:12

3 Answers3

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The data bus size being multiples of 8 is linked directly to the 8-bit byte.

The address bus is different: implementers provide as many bits as needed to access all the memory the processor supports. In the case of the Pentium Pro, it can access 64GB, so it must have 36 bits.

However, board makers can implement fewer bits of address than the processor supports, if they want to have a board that supports less total physical memory than the processor itself can handle.


Operating system software needs to be able to store those 36-bit addresses, and almost certainly stores that in data structures modulo 8-bits!

Application software on 64-bit processors will generally use 64-bit words to store pointers, since they want to be independent of the actual memory limits imposed by the processor, board, operating system, and available (virtual) memory on the user's system.

Erik Eidt
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  • Concretely, [PAE (Physical Address Extension)](https://en.wikipedia.org/wiki/Physical_Address_Extension) which provided support for accessing >4GB on a 32-bit processor didn't expose a flat address space. Instead, to access the full 64GB required switching page tables as needed. The actual entries in the page tables were 64-bit where initially only 4 of those extra 32-bits were used to extend the 20-bit page address (+12 bit offset = 36-bits). – Derek Elkins left SE Apr 30 '17 at 08:25
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Once you settle for the byte as the smallest addressable unit, there is no practical way around data busses that are a multiple of 8. Older systems used different architectures, with smaller base word sizes, probably mostly because memory was that much more expensive when they came about. 8 bit is a sweet spot that scales well.

Martin Maat
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For address paths, you only use as many bits as you need. Let’s say your processor can handle 256MB = 2^28 bytes of RAM and transfers 64 bytes = 2^6 bytes at a time, then you need 2^22 addresses and 22 bit address lines. More accessible memory, and mor or less data transferred at a time, and you need more bits. But every number of bits is fine as long as it is enough.

For data paths, there are two factors: The size of a unit of data in bits, and the number of units transferred at a time. Long ago there have been processors with 18, 36 or 60 bits, but since the 80’s it has been some power of two, 8, 16, 32 or 64 bits.

How many units would you transfer at a time? If you transfer 1, 2, 4, 8, 16 units then the unit address is very easy to translate into a memory address. But say you transfer 3 units at a time: To read unit 100, you’d have to divide by 3, use 33 for the address lines, and you get the three units 99, 200, 101. So transferring a number of units that is not a power of two makes life a lot harder.

That’s why the number of bits in the data path is the number of bits in the unit (power of two for no technical reason, but because everyone else does it), multiplied by a power of two (for technical reasons).

gnasher729
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