Questions tagged [via]

In a PCB, a via is a plated hole that allows electric connection between layers. This is the more common use of the term on this site. In integrated circuit, a via is a small opening in an insulating oxide layer that allows a conductive connection between different layers.

Most PCB vias are "through"; they go from the top, though all intermediate layers, and to the bottom. A "blind" via goes from one side and some of the intermediate layers, but doesn't come out the other. A "burried" via is completely on the intermediate layers.

297 questions
43
votes
8 answers

Vias directly on SMD pads?

I was looking at an example board schematic provided by TI and I noticed something rather curious: vias were placed directly on SMD pads. Is this a normal/acceptable practice to follow, or is it recommended/better to put a short trace and then have…
helloworld922
  • 16,600
  • 10
  • 54
  • 87
34
votes
5 answers

Testpoints: Vias versus pads

I was fixing an ultra cheap home router few days ago and noticed that it had vias marked TP_12V, TP_3V3, TP_GND and similar. The problem turned out to be leaky electrolytic crapacitors in the buck converter and the vias really helped debugging that,…
AndrejaKo
  • 23,261
  • 25
  • 110
  • 186
34
votes
7 answers

Optimize heat sink design - connect cooling pad on PCB backside by vias

In one of my current projects I'm using an MC7805 in a D2PAK package to generate my logic supply of 5 V from an available 24 VDC supply. The current required by the circuit is 250 mA. This results in a dissipated power of the MC7805 of: \$P=(24\…
KarlKarlsom
  • 1,792
  • 2
  • 13
  • 26
23
votes
6 answers

Standard via sizes?

Is there a standard for via sizes, or can you make them any size you want? (I'm going to be using traditional PCB houses to manufacture my PCB's.)
Thomas O
  • 31,546
  • 57
  • 182
  • 320
22
votes
3 answers

How to chose via diameter and drill size based on trace width

I am designing a two layer board, the problem is I do not know how to select via diameter and drill size, as well as outer and inner diameters. In my circuit I use 056, 012 and 006 mil traces: I have asked the manufacturer, they said they can…
Dumbo
  • 3,244
  • 14
  • 44
  • 69
21
votes
2 answers

Can you place vias inside a QFN footprint?

I am designing a very dense PCB containing a 0.4mm pitch QFN chip. In parts it is proving very difficult to fan out. It is made all the more difficult by the huge thermal pad that all QFNs have for some reason. It is reasonable to place tiny vias…
Rocketmagnet
  • 26,933
  • 17
  • 92
  • 177
21
votes
2 answers

How are vias made commercially?

How are or were vias made commercially? Wikipedia (http://en.wikipedia.org/wiki/Via_(electronics)) mentions "The hole is made conductive by electroplating, or is lined with a tube or a rivet" Can anyone provide more details on these processes, with…
orangenarwhals
  • 418
  • 1
  • 3
  • 9
20
votes
2 answers

Castellated/Edge-plated PCBs: Comments on Mechanical/Electrical contact reliability

(This is a follow-up to this related question). I'm interested in some feedback from people's design results/experiences with Castellated PCBs as a method of attaching one PCB to another. By Castellations, I am referring of course to Half-vias or…
OrCa
  • 1,659
  • 4
  • 14
  • 20
19
votes
4 answers

Why are vias bad?

I am designing a PCB with EAGLE and saw that it was trying to limit the amount of vias through the PCB. Why do you want less vias? Why are they bad? Do they bring extra manufacturing cost or is it OK for low-frequency and low-power solutions?
rhbvkleef
  • 341
  • 2
  • 10
18
votes
2 answers

Should you place traces at right angles through a via?

I understand that right angle pcb traces should be avoided because it can cause problems during manufacturing. But what about right angle through a via? Will this have any negative effects? I have a multi layer board and I don't have that much…
efox29
  • 11,827
  • 9
  • 56
  • 102
18
votes
2 answers

USB signal routing - Swap data lines using vias?

I'm making my second USB design, but the D+/D- pins on the MCU (atemga16u2) aren't in the right order for the micro B connector. What's the best practice for routing these to go the right way? My current idea is to rotate the atmega 180 degrees and…
monty
  • 303
  • 2
  • 9
17
votes
1 answer

Using a via to strengthen surface mount connector on or near pad

I am trying to design a board that has a surface mount connector. I was shown a picture of an example board that has vias on the pads of the connector. I don't believe the via is for connecting to a layer necessarily. Meaning I was told that they…
AntMan
  • 173
  • 1
  • 5
16
votes
5 answers

Routing traces to and from a 48 pin microcontroller becoming a mess

I have a 48 pin microcontroller with VCC = 5V. I'm becoming worried that I have the traces too close and all the vias and crossing traces may mess with the signals' integrity. Are there examples and general guidelines to routing traces in such a…
Erv
  • 373
  • 2
  • 11
15
votes
3 answers

BGA escape via dimensions at 0.8mm pitch?

Are there any kinds of standards or common practice dimensions which define what BGA escape vias and routing trace/space should look like at 0.8mm pitch? If not, what's the most economical set of dimensions to use? Several documents I found when…
darron
  • 3,491
  • 2
  • 29
  • 42
14
votes
1 answer

Why does reflection off a PCB via look like this?

My question is related to http://mobius-semiconductor.com/whitepapers/ISSCC_2003_SerialBackplaneTXVRs.pdf. On the page 18 there are a few figures of "TDR off Diferent Types off Vias". I am confused regarding the capacative, inductive and L-C-L…
quantum231
  • 11,218
  • 24
  • 99
  • 192
1
2 3
19 20