Electrical Engineering Stack Exchange
Electrical Engineering Stack Exchange

Questions tagged [timing]

This tag is relevant to issues with timing of a protocol or a standard. This could contain UART/ IIC etc. timing as well as timing for driving a motor.

339 questions
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Software to create timing diagrams

In my professional life, I sometimes need to create timing diagrams for protocols: UART, SPI, etc. However, I can't find any good programs available. What programs can be recommended for this and what is the experience using them?
Seidleroni
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3 answers

Why am I Seeing A Weird "Notch" on the Data Line For Some Logical 1s?

I'm attempting to build a Z80 homebrew computer for some retrocomputing fun and to teach myself the basis of electronic design. For proof-of-concept, I've already assembled a basic system on breadboards successfully in the previous weeks. The…
比尔盖子
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15
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3 answers

Why specify a maximum pulse width for reset pin?

A colleague and I are working with the Analog Devices AD74413R ADC for 4-20 mA current loop communications. On pages 15 and 16 of the datasheet, timing characteristics are presented. We encountered an unexpected specification, a maximum duration for…
JYelton
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15
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4 answers

Rigol DS1074 oscilloscope shows very wrong timing

I have an inverted RS232 signal with 5 baud (200 ms per bit) which is sending the byte 0x33. (The first "Low" is the start bit) When I configure my oscilloscope to 200 ms per unit it shows this signal absolutely perfect. I use the single trigger…
Elmue
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13
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5 answers

Why does the race hazard theorem work?

So for those who don't know, the race hazard theorem (RHT) states that: A x B + A' x C = A x B + A' x C + B x C I understand the other part of the RHT, about time delays and such, but I don't understand why the logic statement above should be true,…
Alex Robinson
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12
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3 answers

What is a false path timing constraint?

In FPGA world, what exactly are false path constraints for an HDL compiler? Why are they useful?
Randomblue
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11
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4 answers

MIDI sequencer timing accuracy using the Arduino

I build these music sequencers. Only it's not exactly a sequencer, it's a physical interface for a sequencer. The sequencer is an application that runs on a laptop that the sequencer connects to, this thing lets the user make drum loops on the fly.…
Steve Cooley
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11
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10 answers

Is there a microcontroller with zero interrupt jitter?

I know that interrupt latency depends on what the CPU is doing when the interrupt takes place (arm interrupt latency guide). This effect is called interrupt jitter. For my application I need an MCU with fixed interrupt latency (zero interrupt…
Andrey Rogatkin
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11
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3 answers

Arduino: better microsecond resolution than micros()?

The micros() documentation notes that the return value will always be a multiple of 4. Is there any way to get a higher resolution microsecond click, preferably down to the 1 microsecond level? Dropping down to the AVR level is acceptable.
Mark Harrison
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10
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1 answer

ASIC timing constraints via SDC: How to correctly specify a multiplexed clock?

Introduction Having found multiple, sometimes conflicting or incomplete information on the internet and in some training classes about how to create timing constraints in SDC format correctly, I'd like to ask the EE community for help with some…
FriendFX
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10
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3 answers

process timing on FPGA

I'm new to fpgas, and there are some timing subtleties that I'm not sure I understand: if all my synchronous processes are triggered on the same edge, then that means my inputs are 'captured' on one rising edge, and my outputs change on.. the same…
Casaubon
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3 answers

How can I implement a very simple asynchronous DRAM controller?

I'd like to know how to build a bare bones asynchronous DRAM controller. I have some 30-pin 1MB SIMM 70ns DRAM (1Mx9 with parity) modules that I'd like to use in a homebrew retro computer project. Unfortunately there's no datasheet for them so I've…
Anthony
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2 answers

Poor eye diagram, where to start looking?

I'm trying to debug a 100Mbit ethernet board and I'm running up against a problem I'm having trouble trying to resolve. This is the eye diagram for the transmit pair. The receive pair is very similar. It's a LAN8700 PHY, and I've got the MII…
akohlsmith
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8
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2 answers

SPI Clock on PIC unstable

I'm trying to configure the MSSP module of a PIC18F25K22 into SPI master mode. I'm looking at the timing and the clock doesn't remain steady through the whole transmission. A picture shows it better than words. After a bit is sent, the clock…
Trenton Holmes
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8
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How do commercial microprocessors meet timing with a gigahertz clock?

I am having troubles making a relatively simple FPGA design (for an Altera Cyclone IV) meet timing for logic driven by a 250 MHz clock. This makes me wonder how commercial microprocessors (such as the Intel Core i7) manage to meet timing at clock…
Randomblue
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