SystemC is a set of C++ classes and macros which provide an event-driven simulation interface in C++. SystemC is defined and promoted by the Open SystemC Initiative (OSCI), and has been approved by the IEEE Standards Association as IEEE 1666-2005.
Questions tagged [systemc]
7 questions
14
votes
4 answers
SystemC vs other HDLs
I am currently involved in a university project to implementing a processor of an existing instruction set. The idea is that by the end of the project I should be able to synthesise this design and run it in an FPGA. Everything is going well so far,…
Andrés AG
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5
votes
2 answers
How exactly does SystemC/SystemVerilog make the verification flow less laborious task
Now days SystemC or SystemVerilog are used for verification of complex designs, especially for things like SoC designs that are really complex. I do know that these languages bring in the OOP design techniques into the digital IC design domain.
What…
quantum231
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2
votes
2 answers
Bit-accurate modelling for algorithms (FPGAs)
What are the software tools used in the industry to build bit-accurate models for algorithms (algorithms which are to be implemented in FPGAs)?
Before using a tool like Quartus, we tried our algorithm in C language. It worked. But the problem is…
RONEY
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2
votes
1 answer
Functional and Timing accuracy of an RTL Model
I am sometimes really confused by the abusive use of jargon in EDA/VLSI design articles and books. With no precise definitions, its upto the reader to make interpretation which is very ambiguous and incorrect at times
Like,
What is the difference…
nurabha
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0
votes
1 answer
How to return from SystemC thread with error code?
I've got a SystemC testbench (for a VHDL DUT but that's irrelevant right now). I'd like to be able to cause the test to terminate, with a specific exit code, from within an SC_CTHREAD. I am pretty new to SystemC (I'm mostly a verilog/sv guy).
I've…
Matt
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0
votes
1 answer
VHDL vs SystemC library
Today I learned about SystemC, a C++ library that make development on FPGA easier. (for people that know C++) Apparently, it is as efficient as VHDL (speaking of performance) and faster to learn and code.
Will VHDL disappear since they have the same…
M.Ferru
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0
votes
1 answer
SystemC simulation Kernel
Using the following code from doulos tutorial on SystemC
#include "systemc.h"
#include
SC_MODULE(mon)
{
sc_in A,B,F;
sc_in Clk;
void monitor()
{
cout << setw(10) << "Time";
cout << setw(2) << "A" ;
cout <<…
Abdo Saied Anwar
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