Questions tagged [programming-loop]

17 questions
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Question about Synthesizable For loop and Generate

I am using the Verilog language and Zedboard as a target board. As far as I know, the for loop can be synthesized, and the synthesis tool translates the for loop as a sequence of duplicated instructions like the loop unrolling. For example, for ( i…
ruach
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Baffling combinatorial feedback loop message in VHDL with ISE Design Suite

When I try to synthesize my VHDL design (using Xilinx ISE Design Suite), I get the message: WARNING:Cpld - The signal(s) 'e' are in combinatorial feedback loops. These signals may cause hazards/glitches. Apply the NOREDUCE parameter to the …
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AVR asm wait loop explain

Can someone please explain me this code (it is from wait loop calculator), I cannot clearly understand calculation. ; Delay 1 600 000 cycles ; 100ms at 16 MHz ldi r18, 9 ;1 clock cycle ldi r19, 30 ;1 clock cycle ldi r20, 229 ;1…
hudy
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STM32 - Using Timer as time base source for HAL in FreeRTOS application

I am learning more about FreeRTOS by making a task-based program. My problem comes when initializing and configuring the HAL time sources. I read that it is necessary to choose another HW timer as time base source and leave the Systick for FreeRTOS.…
M.Brian
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getting error from for loops in vhdl

Hi I am trying to use 2 nested for loops in vhdl but I get this error. [Synth 8-561] range expression could not be resolved to a constant [318] I do not understand why this code is not working since cursor_pos_x or cursor_pos_y are not…
OnurTR
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VHDL: Looping through a module asynchronously

I have a VHDL module that applies a shuffle algorithm to a 64 bit input and outputs the 64bit result. I need to loop this output back through the module exactly 4 times, i was wondering if there was a way to do this asynchronously, or do i need a…
Loocid
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Defining a variable in bytes using Verilog

I am trying to implement a 16byte input (K) in Verilog which I have never done before. Also, I need to pull each byte from the index K using a for loop. In this case, b=16bytes, w=32bits, u=w/8. Here is the for loop pseudo code I took from the RC5…
PrematureCorn
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Delays and/or how to manually cycle clock in a loop when building Verilog testbench to test FSM for microcode/ROM conversion

I am working on a project wherein I need to convert a Finite State Machine coded in Verilog into a ROM. In order to do this I need to create a memory file for the ROM version of the FSM which stores the Next State and Output Values at Addresses…
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Verilog for loop not iterating

The current for loop that I have coded below is getting stuck at its last iteration value. In other words, the value of i initially starts at 0 but once it reaches the first positive edge of the clock it changes to 44 and stays at that value. I…
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Is it possible to pre calculate execution speed of micro controller for a given setup theoretically?

I need to work with 5x MPU9250 sensors, i2c 400kHz, Arduino nano 8MHz also, I have HC-05 Bluetooth device 115200 baud rate serial. is it possible to pre-calculate loop time to gather data from sensors (3x accelerometer,3x gyro, 3x magnetometer) and…
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Variable does not bounce back as desired (LEDs)

I am changing a variable with a predetermined rate. When my variable gets too large, I cap it back to the largest value I want to make it, and change the sign on the rate to make the change go the other direction. x += rate; if (x > 255){ rate =…
pdustin101
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Loop for two binary values in VHDL

I'm trying to write a loop for two binary values that repeat periodically at a specific amount of time that goes indefinitely or until a certain condition is met. Here is what I have wrote (below), but the error states that I should be using the…
Serge
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ModelSim VHDL - Nested 'for' loops behaviour

I've now been a couple years working with VHDL in college and I've been using ModelSim to simulate my designs. Today, however, I noticed something I couldn't understand about for loops, so I thought I'd ask it here :) When using two nested for loops…
user90125
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main program run like an infinite while loop

I'm working in PIC24F microcontroller. My main program doesn't have infinite loop, but it is run like an infinite loop. Before I test the code with infinite while loop (while (1)), but when I remove the while loop, it's still running like an…
user6161
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Help! Verilog loop! The following signal(s) form a combinatorial loop

I'm trying to complete an assignment using Verilog, the details aren't too important, except that it must be a combinatorial design. Unfortunately I'm running into what I assume is the hardware getting stuck in an infinite loop: the following…
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