Questions tagged [nmos]

A n-channel metal-oxide semiconductor (nMOS) transistor has n-type carriers in the channel. A positive voltage on the gate turns inverts the substrate (PWell) creating the channel and turning the device on. The term may also be used to describe logic circuits built around nMOS transistors.

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In an NMOS, does current flow from source to drain or vice-versa?

In an NMOS, does current flow from source to drain or vice-versa? This Wikipedia page is confusing me: http://en.wikipedia.org/wiki/MOSFET The above image confuses me. For the N-channel, it shows the diode's polarity going towards source in some,…
PitaJ
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Why would a Intel 8080 chip be destroyed if +12 V is connected before −5 V?

The Intel 8080 is a classic microprocessor released in 1974, fabricated using an enhancement-mode NMOS process, and shows various unique characteristics related to this process, such as the requirement of a two-phase clock, and three power rails:…
比尔盖子
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Why old PMOS/NMOS logic needed multiple voltages?

Why does old PMOS/NMOS logic needed multiple voltages like +5, -5, and +12 volts? For example, old Intel 8080 processors, old DRAMs, e.t.c... I'm interested in the causes on the physical/layout level. What was the purpose of these additional…
BarsMonster
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Where are the depletion PMOS transistors?

In school, I was taught about PMOS and NMOS transistors, and about enhancement- and depletion-mode transistors. Here's the short version of what I understand: Enhancement means that the channel is normally-closed. Depletion means the channel is…
Stephen Collings
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What does a thick MOSFET symbol mean?

I have come across a bag of about 5,000 n-type MOSFETs (2n7000), and I figured the best thing to do with them is to build a 6502. I found a diagram of the nMOS 6502 layout But I am confused as to whether the thicker red MOSFETs have any…
EvanTheGamer
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Why does the 2N7000 in CircuitLab not behave the same as on my breadboard?

When simulating the 2N7000 in CircuitLab, I was surprised to see that the current was lower than expected for my circuit (90mA at the drain) when the gate is at 3.3 V. So, I built a quick breadboard version and saw that the current was actually…
Nick Bolton
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MOSFET failure in a high power AC-DC SMPS buck converter

I've made a AC-DC step down buck converter that converts 220 VAC to a variable 45 to 70 VDC at 5 to 10 A to charge a Li-Ion battery. I'm currently using ESP32 to drive a MOSFET driver (IR2110) to drive my NMOS placed at the high side of the circuit.…
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Why do we use a CMOS for inverting a circuit when the PMOS already achieves that?

The output in a PMOS is as follows: I/P O/P 0 1 1 0 Why can't I just use this instead of using a CMOS for inverting logic? (Please explain in simple terms as I am a beginner in this topic and subject)
Harshit Pandey
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Low Drain-Source MOSFET Leakage

I've been looking at the SM74611 Smart Bypass Diode from Texas Instruments and am very impressed with the reported reverse leakage current (0.3uA at 25C). Considering the device has a N-Channel FET, 0.3uA of Drain-Source leakage current @ 25C is…
TRISAbits
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Nmos-bjt darlington pair dc bias. [Homework Help]

I have a homework assignment I need some help with. I wanted to know if someone could tell me if I'm doing the dc bias calculations correctly, if not, could someone nudge me in the right direction. I'm not talking about the ac analysis, only…
user3657
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Pull up resistor on P-MOSFET gate. Not working

I am building a battery-powered datalogger that will communicate using cellular signal, based on the ATSAMD21 microcontroller and the SIM5320 cellular modem. To save power, an outside timer periodically switches the microcontroller on/off (not…
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How to determine Vth, Kn and delta from NMOS datasheet

Given this two graphs below, how do I determine Vth, Kn and delta from this? I used this formula's so far: The graphs are taken from the datasheet of Supertex VN10K Can someone please help me in the right direction? (1) I used two Id(non-sat)…
ISJ
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What problem is solved by using a PMOS for reverse polarity protection instead of an NMOS?

Many resources suggest the use of a PMOS for reverse polarity protection instead of a diode, as it decreases losses. However, the characterstics of an NMOS are better than a PMOS, so why is using it for reverse polarity not often mentioned? Here's…
Anas Malas
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Why do we need transmission gate for XOR (transistor level design)?

The following image shows a 6-transistor XOR circuit. But I don't know why the last 2 gates are needed at all, the circuit can be simplified to: Is there anything that prevents us from using the last circuit? I tested all 4 scenarios of (A,B) =…
Balawi28
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Do FETs have a Maximum Gate-Drain voltage?

I know FETs have a Absolute max \$|V_{gs}|\$, and a max \$V_{ds}\$. So can we assume, say for an N type, that: $$\text{max}|V_{gd}| = V_{ds} + |V_{gs}|\\$$
Andrew Pikul
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