Electrical Engineering Stack Exchange
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Questions tagged [nand]

Use this tag when referring to any circuit that uses NAND gate / NAND logic, or for asking questions relating to NAND gates.

NAND gates are "NOT AND" gates, or AND gates with inverted outputs. They output a 1 for all input conditions except when both the inputs are high. NAND logic refers to the system of logic that replaces all of the gates in AOI logic with NAND logic chips.

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Flash memory: What are blocks and pages from a physical standpoint?

I would like to know the link between the physical layout of NOR and NAND flash cells and the concept of blocks and pages. I would also like to know the exact reason for why only entire blocks can be erased. I also don't get why NAND memory is not…
toad_rafter
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Is the NAND logic gate perfectly symmetrical?

In other words: if we swap A and B, will Q behave exactly the same in DC and transient analysis?
Vahram Voskerchyan
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How to build a 3-input NAND gate from 2-input NAND gates or a 3-input NOR gate from 2-input NOR gate?

For NAND, I am doing a truth table for it and then truth tables for all the possible combinations, but as you can see the process is very long and I am still yet to get an answer. Same goes for NOR gate. How do you go about it?
studious
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Making a logic circuit with only NAND GATES?

I am trying to create a logic circuit using only NAND Gates for this expression: (NOT Q AND P) OR R This question has really gotten me stuck! Can somebody please help?
Mathematica
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Should I glue BGA chips in the corners before soldering them with hot air?

I have often see ball grid array (BGA) chips, mostly those from CPUs or GPUs, being glued around in the corners with some red glue or to the perimeter with a translucent one. Having to manually solder BGA chips using hot air, should I glue the chips…
OuzoPower
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Minimizing logic expression for two-input NAND gate implementation

I have recently been struggling with this homework problem that is requiring minimization of a logic expression to be implemented using all NAND gates. The problem requires a very small number of NAND gates, and I am finding it impossible to reduce…
armencm02
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Boolean Logic - Realization with using only 4 NAND gates

I am currently preparing the next semester of my program at university and I am stuck at a question of the "Digital Circuits" class. Here is the task: [...] pump P1 runs when the fill-level of the tank falls below 90% (U=0), however only when the…
jesm86
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Why can't NAND flash memory be a random access memory?

When I read any documents regarding NAND and NOR flashes. They say that NAND is sequential memory whereas NOR is random. I dont understand what stops NAND memory from being random too as the only difference in these two memories are being serial and…
JIN007
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"Path to ground with no resistance!" error when trying to simulate a circuit

I'm trying to simulate a NAND gate using transistors and I have remade the circuit as it was in the notebook, but the simulator shows me the error in the title. This is the circuit scheme: What is the meaning of that error? What is not properly…
Kudor
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Line follower robot using only NAND gates

I'm stuck on this and would appreciate some pointers. So for class I have to figure out the logic for a line follower robot using at maximum 8 NAND gates (two 74HC00 Quad NAND ICs). The robot has three sensors, each of which gives logic 1 when on a…
Talar
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More Fun with the CD4093 IC as Schmitt Trigger Oscillator. Any practical difference between circuit version with "Enable" pin and Without?

I built two Schmitt trigger oscillator circuits using the CD4093BE IC from Texas Instruments. The CD4093 is a quad NAND gate with Schmitt trigger inputs. You can find the datasheet here: http://www.ti.com/lit/ds/symlink/cd4093b.pdf This question…
Brock R. Wood
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TTL NAND gate (totem pole) current and voltage analysis

I am working on a few practice problems for my course and I am unsure about my working throughout. hoping for some feedback and guidance from the community as it's not my strongest topic. Here is what I'm trying to do. I am trying to analyses the…
Tony GR
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TTL NAND analog amplifier does not work in Multisim - why?

I have found in Dieter Nuhrmann's book an interesting approach to amplifier circuit and decided to test it. Unfortunately the Multisim simulation does not work as expected. The signal is not amplified at the output. What's wrong or what I'm doing…
Jerzy Przezdziecki
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eMMC interface : Parallel vs SDIO

I want to use an eMMC card for my application. After searching on different websites,I was not able to find any parallel interface supported eMMC chip. Is parallel interface available for eMMC chip? What are main differences of eMMC parallel vs…
kernel
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What is the point of converting everything to NAND/NOR and how do you do it right?

The title pretty much says it all. I know that A' + B' = (AB)' is the basic transformation needed to do so (at least for NAND gates), but whenever I apply this I feel like I'm doing it wrong. For example: C' + AB' + A'BD' Here's what I did: I took -…
Alex
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