Questions tagged [multiplication]
8 questions
14
votes
2 answers
Avr-gcc using repeated addition instead of MULU instructions
I recently compiled some C++ code for the ATmega1284P in Atmel Studio and was analyzing the timings of some routines using my scope. To my surprise, a loop I thought I had optimized was taking longer than expected.
After taking a peek at the…

Hackstaar
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1
vote
1 answer
Demonstration of Unsigned to Signed Binary Multiplication
I am trying to deepen my knowledge about multiplication with signed binary numbers (in two's complement) and as I was following along a video about the multiplication of 4-bit signed binary numbers, I couldn't really understand how and why some…

Filipe Almeida
- 13
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1
vote
1 answer
Multiplication 32x32 Mealy machine using 16x8 multiplier Verilog code
I am trying to implement a multiplication 32x32 Mealy machine using a 16x8 multiplicator in Verilog. I wrote the arithmetic part and the FSM part + a code to connect both and a test bench, but when I am trying to run it in Modelsim, it seems like…

SpaceNugget
- 13
- 4
0
votes
2 answers
Frequency multiplication with PLL circuit
I am currently working on frequency multiplication with a PLL circuit.
I want to give it an input frequency of 10 kHz to 100 kHz and I want to get 160 kHz to 1.6 MHz from the VCO output. That's a multiplication factor of 16.
I found some ICs such…

natarajmarble
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0
votes
0 answers
Multiplication of pulse trains
Suppose I have two pulse trains, with pulses some tens of nanoseconds apart and long (evenly spaced and equally for both of them). Each of the pulses has some amplitude \$v_n\$ in one train and \$v_n'\$ in the other.
How (if possible) would one go…

benfisch
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0
votes
1 answer
Is there a modular multiplier design that can give the result in 1 cycle?
I need to perform modular multiplication on two large numbers (more than 10,000 bits wide). I've found papers that give designs that can that calculate the result in N cycles, but in my case, that would take over 10,000 cycles to compute. How can it…

Hisoka
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0
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0 answers
FPGA multiplication using DSP hardware, signed vs. unsigned
I'm using the DSP unit (just a fancy name for the multiplier/accumulator unit) of the Gowin GW1N devices to do some fairly simple math. These units accept two 18 bit inputs for the multiplier adding the 36 bit result into the 55 bit accumulator. …

gnuarm
- 187
- 11
0
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0 answers
Multiplying twos complement binary numbers
I have a project where I am developing a basic processing core on a FPGA from logic gates. So of course I have an ALU that I am building out of logic gates. I have no issues with the rest of the ALU functions: add, sub, shift left/right, OR, CMP…

David777
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