Electrical Engineering Stack Exchange
Electrical Engineering Stack Exchange

Questions tagged [layout]

Layout is the process of designing a PCB including placement of parts and routing of traces.

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Decoupling caps, PCB layout

I guess I've been somewhat ignorant when it comes to the finer details of pcb layout. Lately I've read a couple of books that try their best to lead me on the straight and narrow. Here is a couple of examples of a recent board of mine, and I have…
morten
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Should chassis ground be attached to digital ground?

I'm working on a PCB that has shielded RJ45 (ethernet), RS232, and USB connectors, and is powered by a 12V AC/DC brick power adapter (I do the 5V and 3.3V step down on board). The entire design is enclosed in a metal chassis. The shields of the…
cdwilson
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How to connect USB Connector shield?

How should I route USB Connector shield on PCB? Should it be connected to GND plane right where USB is placed, or should the shield be isolated from GND, or should it be connected to ground through ESD protection chip, high resistance resistor or…
Andrzej H
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Standard PCB trace widths?

Is there a standard for the sizes of PCB traces? That is are some 25 mil and others 10 mil or is can you choose your own? I plan to run 400mA through some thicker traces, but less than 30mA for all other traces. About what size would I need?
Thomas O
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Why should you use two resistors in parallel on an LED?

So I was looking over the Arduino R3 schematics and noticed this little design choice: What is the reason for doing something like this? I mean it's hard to know what the designers were thinking, but maybe it was done this way to save space. Do you…
Jake Robinson
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What is causing large oscillations in my DC/DC boost converter? Is this ground bounce or some other effect?

I designed my first PCB for a DC-DC boost converter only to find that it produced very noisy output. The design is based around the MIC2253. Here's a schematic: Although my circuit allows for different combinations of input voltages (Vin) and…
Dave.Mech.Eng
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Do you layout in mil or mm?

I have been using 10 mil trace with 10 mil spacing. The PCB vendors quote that they like traces down to 7 mil. But then I ran across a PDF showing how to fan out a QFP to get all the signals accessible. They use millimeters because the QFPs are…
Robert Deml
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Standard PCB Layout Book

Are there any good references on advanced PCB design/layout/routing? There seems to be a large wealth of circuit design books, books about RF PCB design, and books dealing with high-speed digital design. None of these books are what I'm talking…
Joel B
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Have I placed too much on this PCB layout?

I am doing my first PCB layout (using Altium) and have finally gotten past the auto-router stage. The result is a mess and there are some missing nets and design rule violations. Have I packed too much on this board or do I just need to re-think my…
user8908459
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PCB layout questions for MCU breakout board

I'm attempting to route a board that is, essentially, a breakout for the LPC23xx/LPC17xx MCU. I've never routed anything approaching this complexity before, and I have a few areas of concern. I know that a four-layer PCB would be optimal, but I'm a…
Mark
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Are there reasons *not* to have a copper-pour ground plane on a PCB?

I am taking a first stab at designing a PCB from scratch. I am considering using a CNC mill fabrication process, and it seems like with this process I would want to remove as little copper as possible. A copper-pour-style ground plane would seem to…
Kaelin Colclasure
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What's the schematic to share one crystal with two micros?

How do I share a single crystal (not a complete oscillator module) between two micros? Is it OK to just connect everything as normal for the first micro and also directly connect its XO to the XI of the second microcontroller? I expect to place the…
joeforker
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Can you place vias inside a QFN footprint?

I am designing a very dense PCB containing a 0.4mm pitch QFN chip. In parts it is proving very difficult to fan out. It is made all the more difficult by the huge thermal pad that all QFNs have for some reason. It is reasonable to place tiny vias…
Rocketmagnet
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PCIe, diagnosing and improving an eye diagram

I have implemented a design that uses PCIe. It is somewhat different in that the PCIe interface is used as a chip-to-chip communication lane on a single PCB (e.g. no PCIe connector). The root complex device is a Freescale i.MX6 which is PCIe Gen 2…
Funkyeah
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How critical is the layout of USB data lines / how does my layout look?

I'm laying out the USB data lines on my board at the moment, and I'm just trying to get an idea of how well off my design is gonna fare. Here are the particulars: 4 layer board (from the top: signal, ground, split power planes, signal) internal…
Toby Lawrence
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