Questions tagged [integer]
6 questions
3
votes
1 answer
VHDL - big difference in schematics between integer with and without range
I just discovered something that I would like some expert to comment on.
CODE EXAMPLE A:
entity PipelinePoc is
Port ( clk : in STD_LOGIC;
led : out std_logic_vector(0 downto 0)
);
end PipelinePoc;
architecture Behavioral…

Stephan Møller
- 211
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1
vote
1 answer
STM32F4 PLC Integer Calculation vs Float Calculation
I am using a PLC that uses a STM32F4 as its processor.
The PLC software has Integer and Float calculation commands. When I work with floating point numbers I usually try to use integer calculations and the result is divided by 1000 to get the final…

user_fs10
- 861
- 3
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1
vote
1 answer
My itoa (c++)conversion has a problem
I am receiving a string of data via UART in PIC32, extracting and concatenating two of its bytes, dividing the result by 2, converting the resulting integer to a string and transmitting via i2c to another PIC32. My problem is that this conversion…

Ahmed
- 171
- 1
- 6
1
vote
1 answer
VHDL unranged integer input ports bad practice?
I'm designing a customizeable interpolation filter and I'm looking for the best way to pass the coefficients (rather supporting points) to the filter. Below you see the current implementation.
package lin_interpol_filter_unsigned_pack is
…

Andy Ef
- 113
- 1
- 10
1
vote
0 answers
PIC assembly: express integer constant as string at build time
One of my engineers came to me with a question that I can't answer. This is for a project using a PIC16F controller, all written in assembler.
He is defining a constant that he wants his program to use in two different ways: as an integer for use…

Dwayne Reid
- 23,390
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- 67
0
votes
1 answer
Subtracter with VHDL
I have this:
LIBRARY ieee ;
USE ieee.std_logic_1164.all;
use ieee.numeric_std.all;
USE ieee.std_logic_arith.all;
ENTITY FullSubtracter1 is port(In1, In2: in std_logic_vector(31 downto 0);
Overflow: in std_logic_vector(0…