Electrical Engineering Stack Exchange
Electrical Engineering Stack Exchange

Questions tagged [drc]

Design Rule Check(s): a checking procedure that PCB CAD software does against a design rule file.

Design Rule Check(s): a checking procedure that PCB CAD software does against a design rule file.

During the DRC, the following rules may be checked:

  • Layer construction
  • Track minimum widths, drills, vias, blind vias
  • Clearance among tracks, pads, SMD pads, and vias
  • Distance from wires and pads to edges
  • Pad/drill ratio
  • Shapes and rounding
  • Thermals
  • Masks
  • Cosmetic features
63 questions
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DRC tool for Gerber files

Do you know any tools which perform design rule checking for Gerber files of PCB and are suitable for using in batch mode on a remote server? Something similar to what BatchPCB or FreeDFM uses (I asked BatchPCB but they haven't answered yet.)
Dmitry Dzhus
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Are acid traps real? (2014)

Some people online say that acute angles in trace routing will cause these problems: "Acid Trap" - PCB etchant gets stuck in the corner, and eats away too much, causing open circuit "Peelable" - Narrow strip of photoresist falls off the board…
AlcubierreDrive
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What are good values for standard design rules (like clearance, trace width, etc.) in PCB design?

I am working on a project for LED control with MCU and LED drivers. I have an input voltage of 24 V and a DCDC converter to 3.3 V for the MCU. Each LED controller will have an output current of 1 A. I searched all over the Internet and could not…
Urban
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Is it important that vias are plated on a PCB?

As in the title. I've noticed several PCBs of mine have vias which are not plated - they do not have a characteristic "gold" shine to them. I suspect this is because I was pushing the limits of drill sizes - my fab specifies 12 mil and I used 15 mil…
Thomas O
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What are standard design rules for a Flex Printed Circuit (FPC)?

For an FPC made out of Kapton (polyimide), what are the: min trace width min trace-trace separation min distance from a trace to the edge of the FPC min drill hole diameter min distance from a drill hole to the edge of the FPC min distance from a…
AlcubierreDrive
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4 answers

Is it possible to repair a PCB which has suffered a DRC failure?

Okay, so I was a bit of an idiot while designing my PCB. The specifications of my PCB fab were 6/6 mil trace/space, and the boards did not meet this. So, below is the design for the PCB: The trace going to C16 (a ground) is way too close to the pad…
Thomas O
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Suggested schematic check DRC settings for Tools>Verify in DxDesigner

I am using DxDesigner for the first time (9.2). When running a Design Rules Check (DRC) there are many rules that can be applied. Many of them make sense to check, e.g. "Property name exceeds maximum length". Others are giving me trouble, e.g.…
Brian Carlton
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Need for DRC for Gerbers?

In reference to this question, do you actually perform DRC on Gerbers? Or do you do it for the PCB (post-design or interactive) and trust that the generated Gerbers will be OK?
Federico Russo
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Altium - Change Color of Error Text in HUD

I had this set up on my PC a few weeks ago but lost it when I had to switch computers. I am trying to remember how to change the color of the Online DRC Errors shown in the HUD when hovering over the segments causing the error. I do not want to…
DerStrom8
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Kicad DRC Error "Footprint has no courtyard defined"

At the final stage of the PCB design, I performed an ERC check. I got the message: Footprint has no courtyard defined @(156,718mm, 78,296mm): Footprint RV1 on Front This is a picture of my custom footprint: What is the meaning of this message?
user1584421
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Altium: Design rule to highlight a plane that is not assigned to a net

In Altium Designer 20.1.14.287 I tried to create a design rule that would highlight that a plane is not assigned to any net after running the DRC. But in the PCB Rules and Constraints Editor I only find rules for plane clearance and connect…
Thomas
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Altium - Hole to hole clearance rule that only applies when nets are not the same

Our PCB manufacturer specifies that there should be a minimum clearance between holes of 0.5mm when nets are different. I am getting a lot of errors when I have thermal pads with embedded vias closer than 0.5mm, but the nets are all GND. How can I…
TripleAntigen
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How can I prevent the DRC in KiCAD from checking my silkscreen layers?

I am currently working on a PCB with a lot of components which are very close to one another. For this PCB I do not want to manufacture the silkscreen layers and I do not want the DRC to check for silkscreen errors. Currently I get a lot of "overlap…
F_Schmidt
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Altium track width DRC error on corners

I just ran the DRC check in Altium for my PCB and I get errors on trace width for every trace segments on the board. What is the reason for this ? It generated thousands of errors even tho all the traces are 4 to 5 mils wide. All tracks width rules…
GmodCake
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Altium Designer 17 DRC taking for ever

Intro: My Colleague and I have been using altium Designer for Sometime now . Currently AD 17.1.6 (build 538) . The PCB we draw are 3d 4 layer maximum . the only difference between us is that the smallest grid I use is 0.1mm , while he uses the…
ElectronS
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