Electrical Engineering Stack Exchange
Electrical Engineering Stack Exchange

Questions tagged [dfm]

Design For Manufacturing - Principles and techniques that are used to ensure that a product is more easily manufactured, has higher yield during manufacture and/or exhibits lower cost of manufacturing. May be accomplished through choice of components, extra circuits for testing through to mundane issues like space for fixturing and labeling amongst many other techniques.

further reading

Design for assembly (DfA) for throughole components and surface mount components. The section on surface mount is somewhat outdated, though.

27 questions
49
votes
13 answers

How to go from newbie to manufactured?

I'm a software guy who wants to get into the hardware side of things so I can enjoy the same creativity from software design in the physical world. I've found plenty of posts here regarding how to get "up and running" in the electronics world, but…
DJ_R
  • 593
  • 1
  • 5
  • 5
11
votes
5 answers

Does the PCB have to be thinner than through-hole pin length?

If I have a part that has pins that are 1.2mm long. Can I use a PCB that is 1.2mm thick or does it need to be even thinner than that?
the five states
  • 111
  • 4
10
votes
4 answers

Are acid traps real? (2014)

Some people online say that acute angles in trace routing will cause these problems: "Acid Trap" - PCB etchant gets stuck in the corner, and eats away too much, causing open circuit "Peelable" - Narrow strip of photoresist falls off the board…
AlcubierreDrive
  • 1,484
  • 2
  • 18
  • 26
7
votes
1 answer

How to make a device in miniSD or microSD form factor?

I would like to design and get produced a device in miniSD or microSD card form factor. This is not actually a memory card, it just uses that connector. There are other devices like that, for example Electric Imp. I'm wondering what type of…
Alex I
  • 3,341
  • 2
  • 36
  • 59
7
votes
5 answers

How close is too close for traces on a PCB?

Are these traces too close for conventional PCB manufacture? DRC check advises against it, but I haven't filled out all the settings for it. For scale, the resistors are all 0603.
Thomas O
  • 31,546
  • 57
  • 182
  • 320
5
votes
1 answer

PCB pads different diameter on top and bottom

When I had a DFM review on a board I have designed, the feedback was that the pads on layer 1 (top) needed to be reduced in size, to: "avoid the issue of copper temperature taking during wave soldering and for reasons of rise of alloy in the plated…
droseman
  • 153
  • 1
  • 12
5
votes
2 answers

Why are reversed geometry (0306, 0204) capacitors not used more often?

It seems that reversed geometry or low inductance ceramic chip capacitors (MLCCs) are simply better in every spec than regular geometry, and may allow using just one value to bypass instead of two (eg a reversed 1uF instead of a 1uF and 0.1uF). …
Alex I
  • 3,341
  • 2
  • 36
  • 59
5
votes
3 answers

Via to Pad Clearance

Is it possible to put a via right next to the component pad it is connected to? In other words, if a via and a component pad are on the same net, can they touch as in the image below (red=top layer, yellow= mid layer, gray=via's pad, brown=hole,…
aghoras
  • 425
  • 6
  • 12
4
votes
1 answer

What is the purpose of these unusual IC footprint features?

I am working on creating a footprint for the MAX25254 buck regulator and am puzzled by several inconsistencies which are proving annoying: Inconsistent pad sizes Seemingly unnecessarily complicated shapes Rounded corners but with inconsistent radii…
JYelton
  • 32,302
  • 33
  • 134
  • 249
4
votes
3 answers

Balancing copper on inner layers of PCB

A similar question was asked - What is Copper Thieving and why use it? And my question originates from the comments of the answer in the linked question. I have read and understand that to help the etching process, you balance the copper so that it…
efox29
  • 11,827
  • 9
  • 56
  • 102
3
votes
1 answer

Best practice for ICT test point locations

While I have found a few resources (here here here) describing the coverage (strive for 100 %!), distribution (avoid clustering, at least 100 mil apart, away from tall components), and size (40 mil if you can) of test points designed for bed of…
calcium3000
  • 2,484
  • 1
  • 14
  • 41
3
votes
1 answer

How close can BGA packages be placed to each other?

I'm wondering if there is some rule of thumb about how close different BGA packages can be placed to each other. What limits that besides pick and place accuracy? I'll ask a few board assembly places for their recommendation but I was wondering…
Alex I
  • 3,341
  • 2
  • 36
  • 59
2
votes
1 answer

What determines the choice of maximum material condition (MMC) versus least material condition (LMC) when designing a BGA footprint?

I am evaluating the IPC-compliant footprint wizard in Altium Designer. One of the steps is to determine the pad size relative to the nominal ball diameter: Related to this topic, an answer provides a table showing that the resulting pad diameter is…
JYelton
  • 32,302
  • 33
  • 134
  • 249
2
votes
1 answer

What does this statement about fiducials mean?

Found this slide and I didn't understand the last statement. All fiducials should have same image one layer down Are fiducials not top/bottom layer registration targets during assembly ? Are/Can fiducials used during manufacturing to align layers…
efox29
  • 11,827
  • 9
  • 56
  • 102
2
votes
1 answer

Pogo Pins for 1.5mm Pitch Test Fixture

I'm working on a design and am going to source a smaller pcb and solder it to my design. Before using the sourced board I'm wanting to test it and so I'm trying to design a test fixture similar in concept to the ones described in this Spark Fun…
user16105
  • 171
  • 1
  • 1
  • 14
1
2