Electrical Engineering Stack Exchange
Electrical Engineering Stack Exchange

Questions tagged [cmos]

"Complementary Metal-Oxide Semiconductor" is a process which implements a combination of PMOS and NMOS transistors. Most current digital logic is implemented in CMOS. Its cost-effectiveness due to being so widespread means many other applications have become common as well, such as in analog design, image sensors, telecommunication, etc.

CMOS inverter

Further reading
HCMOS Design Considerations, TI Application Note SCLA007A
Moore's Law
CCD vs. CMOS Image Sensors, Wikipedia

CMOS: Circuit Design, Layout, and Simulation, R.Jacob Baker, Wiley

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Sizing MOSFET gate resistor

I have an N-MOSFET gate connected to a 4043 logic. Id is about 100 mA. Both the 4043 and MOSFET have +5 V. I plan to use a 2N7000. How large a gate resistor do I need between the 4043 and MOSFET? The logic output is sometimes switched rapidly. How…
hanukas
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"Tristate a pin"

What does it mean to "tristate a pin" on a CMOS microcontroller?
J. Polfer
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What' so great about CMOS?

I've read lot of topics here. I read some people saying I prefer to "have CMOS characteristics" & so on , also in some data sheets (like AVR), they say it have CMOS characteristics, etc... I remember once "CMOS compatible" word? So why having…
xsari3x
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How are CPUs designed?

I've started playing with electronics a while ago and making simple logic gates using transistors. I know modern integrated circuits use CMOS instead of transistor-transistor logic. The thing I can't help wondering about is how CPUs are designed. Is…
Overv
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Why have both: BJT and FET transistors on IC output?

This is the structure of FAN3100 gate driver IC: (taken from its datasheet) As you can see - there are two ouput switches: CMOS and BJT. Why they put them both?
Roman Matveev
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Why is there no rolling shutter when using a mechanical shutter?

So I know it might not be the best place to ask this question, but maybe some of you are familiar with the mechanics of digital mirrorless cameras and the technology of CMOS sensors. I don't quite understand why electronic image sensors, that create…
Thomas D.
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In theory, is it possible to make a logic gate that uses zero current?

CMOS greatly reduces the current draw of ICs because one of the complementary FETs is always in the non-conducting mode, so there is only a flow of current during the transition between states, which is just the amount of charge on the gate's…
endolith
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What does the dashed line between diodes in a CMOS protection network mean?

On the datasheet for CD4007 there are schematics for the input protection network: and the output protection network: On both, there are 2 diodes connected by a dashed line (D2 on the input and D1 on the output). What does the dashed line…
Alex Malcoci
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Why does switching cause power dissipation?

I know that switching logic values causes power dissipation but I could never understand why. Is it because transistors need to be turned on each time we want to charge/pull up a node and discharge/pull down a node? Is this power consumed by the…
penguin99
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Why do CMOS NOT gate designs differ from BJT NOT gate designs?

If you look for an inverter circuit on Google Images, you'll find something that looks like this: This inverter design has a single NPN transistor. However, on Wikipedia's article about transistor count, inverters are listed as having two…
Nip Dip
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Voltage at what Amperage

I've often seen devices with power requirements specified only in Volts (e.g. 7-12V) but never the amperage. I've wanted to run various embedded devices of wall warts and batteries (the devices have regulators don't worry) however I've been hesitant…
user3045
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Can unconnected inputs make an IC get warm?

I am using an ATF16V8 PLD for some simple glue logic. While testing it on a prototyping board, I noticed that it gets warm to the touch almost immediately. I checked that no outputs were short circuited, but I also knew many inputs were left…
NeonMan
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Need clarification regarding op-amp's ground/ reference and common mode dependence on supply

I am confused about several aspects pertaining to op-amp DC biasing and its effects on ground/common mode limits. The more I read about this, the more muddled up I get. I will try to frame my queries as coherently as possible and would really…
needbrainscratched
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Do MOSFET logic gates necessarily need an N channel MOSFET?

I've been studying CMOS logic gate design, such as an inverter here: Why do we need the N-channel MOSFET at the bottom at all? Couldn't it be replaced with a simple resistor into ground like this?
Soumil
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Does this circuit have marginal voltage level problem?

As a research for the problem I described here I found this circuit by Maxim: This is clock doubler, and must be a really good fit in my case as input frequency is very well defined. However looking through the datasheets I found that MAX9010…
Anonymous
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