How to connect decoupling capacitor when VCC/GND pins aren't close

Question

I'm making a board which will host an ATmega 162 microcontroller in PDIP package. Unfortunately, VCC and GND pins are diagonally arranged. From what I've read, the capacitors should be as close to the pins as possible for maximum effect.

Right now, I can see 3 ways to connect the capacitors. Run wires to the capacitors so that they are at equal distance from both pins, place capacitors near ground and run wire to VCC or place capacitors near VCC and run wire to ground. There's always the "none of the above" option too.

How do I make right decision in this case? Or is is irrelevant?

Answer 1

For these types of packages you should use at least two equal bypass capacitors, one at each side of the IC (one near ground and one near VCC). The parallel inductance of two traces to two different caps lowers the total trace inductance and the current flowing from each bypass cap in opposite directions helps cancel out EMI. See Henry Ott's book "Electromagnetic Compatibility Engineering" for more details here. Apparently this technique reduces noise by a significant amount and will also help functionally. This technique taken to the extreme would involve using a power and ground plane and surrounding the entire chip with bypass capacitors, or if you have the money to spare, using buried capacitance planes, but simply using two caps at either side of the package makes a large and measurable difference (as opposed to just at the VCC side) (I'm too lazy to look it up but I think we're talking 10dB+ improvement).

EDIT: Added my cheesy drawing. The arrows are supposed to show the canceling current loops (one clockwise the other counterclockwise), but note the capacitors should be placed closer to the chip then I drew.

Answer 2

Answer 3

The decoupling capacitor goes as close to the power pin as possible, as the power line has a higher impedance than the ground reference. There should be a large ground plane, ready to provide a very low impedance path. A power plane is sometimes employed in multilayer (4+) designs for, among other things, a low impedance source.

You talk about wires, which leads me to believe you are using a breadboard. In this case, decoupling capacitors are just as important, but parasitic inductance and capacitance and ohmic contacts will mask their effects. Use the power rails for power and ground, and tie them together in multiple locations -- no ground loops! I wouldn't bother with anything other than a large electrolytic (10uF) in a breadboard unless it doesn't work, as it is only for prototyping simple circuits. (Does this work?) Troubleshooting decoupling requires the real layout (if the final product is in a breadboard, then go for it).

Answer 4

For a PCB design, I almost always use a ground plane and for chips with opposite power pins I place a cap next to the power pin and ground the other end. The ground plane has a low inductance which reduces the effect compared to wiring a single trace to Vss. The goal of the decoupling cap is to provide a local current source for the chip, so this works well.

If it's a breadboard, I usually just solder some wires to a 100n cap and wire it over the chip. Messy, but it works.

Answer 5

Overall distance matters, as inductance increases as you increase the wire distance. However, the position of the capacitor along this wire should not matter.