3

Why ARM cores consume little power compared with x86 CISC implementations?

What are the valid reasons?

  • because of it's fabrication technology?

Could this be right? ARM cores have been fabricated on various fabrication technologies worldwide even some fabrication technologies are not advanced like Intel's fabs.

  • Due to the RISC simple instructions and pipelines.

Is that because simple instruction set need very little silicon area and that area could save lots of power.

  • Due to the load store

Due to the simplicity of the load store architecture , so there are no macrocode to microcode translation required. So again low silicon area as well as branch prediction algorithm could easily predict memory locations which would be used in future, so low cache is required due to less cache misses. So again small silicon area which leads to small power consumption.

  • Due to AMBA bus and SoC

Since the RAM and ROM and system peripherals were designed closely to the Core very low cache is required and it would save energy.

  • Due non backward comparability

Unlike Intel, it does not need to support for backward comparability so when it comes to ARMv7 almost all energy hungry deprecated instructions were gone and new instructions are there for their place.

  • Due to power saving modes.

However these modes are also available in x86 processor too.

  • Because of historical decisions.

ARM is keep everything new and updated. Unlike x86 there are no historical mistakes affecting continuously. They were reviewed and corrected in next ISA. And ARM is formed newer than the x86, so historically decisions are made concerning it's power wall. Unlike Intel.

  • Due to the operating system and Kernel , firmware power saver support.

Is that due to the support in OS and kernel itself. For a example linux embedded have patches for advanced power saving mode. To automatically reduce the speed when battery power detected low. But this fact did not related to the power wall at all.Anyway could we still consider this as a fact? Up to what extent?Android power management

What are other valid reasons?

Standard Sandun
  • 1,695
  • 2
  • 23
  • 38
  • 3
    "This is a too general question." - then why don't you make it more specific? -1 for knowing your question isn't a good fit and still posting. –  Jun 25 '13 at 15:58
  • *"I'm so important that the rules shouldn't apply to me"* Wrong. – Olin Lathrop Jun 25 '13 at 16:23
  • 3
    This is not too bad of a question, actually. Effort went into preliminary research. – Nick Alexeev Jun 25 '13 at 16:41
  • @OlinLathrop ,@Nick Sir, Actually I done more research, I need help from you guys to make this more specific. – Standard Sandun Jun 25 '13 at 16:43
  • It is entirely allowed to answer your question. This question would be much better if you reduced it down to actually asking a question, and then presented your answers in an answer. – The Photon Jun 25 '13 at 19:01
  • @ThePhoton I need to validate my points. And let also others to give their new points. I'm writing a technical report. These facts are something that I guessed. I tried on ARM web site even but they silent about what technologies that they use to archive that low power wall. – Standard Sandun Jun 25 '13 at 20:02
  • Since it's clear that ARM lower power is not on it's fabrication technology, instead Intel have the latest fabs so it's not a valid point. But it still there. Should I have to change it. It's not the answer, it's the question. – Standard Sandun Jun 25 '13 at 20:04
  • @sandundhammika Are you by chance comparing low power, embedded ARM to desktop and server x86? The fastest embedded ARM chips perform about as well as a PC from 2000, roughly speaking. You should compare to something like Intel Atom. – Kaz Jun 26 '13 at 01:19
  • @Kaz , Yes the Cotex-A51-52 processor series. Same 'A' series. yes they have build desktops. And I don't have issues with ARM neither Intel. I just preparing a tech report. And both sides are only mudding each other, there are no constructive side neither companies revel why, the underlaying technologies behind it very rarely. They would like to keep them as Tech secrets. If somebody says "ARM sucks" or "Intel SUCKS" without any tech reason or stastics or any point then probably he/she does have some mental issues. – Standard Sandun Jun 26 '13 at 15:41
  • It looks like there's no clear winner on MIPS/watt: http://www.extremetech.com/extreme/188396-the-final-isa-showdown-is-arm-x86-or-mips-intrinsically-more-power-efficient/2 it's just that ARM target the lower end whereas Intel go for highest absolute performance. – pjc50 Sep 30 '14 at 15:42

1 Answers1

5

The original ARM architecture is designed so that even a relatively simple instruction decoder would be able to operate at the maximum speed permitted by the architecture. Later ARM versions have slightly more complex instruction-decode logic, but every instruction is either one or two words long. On the x86 architecture, instructions can be anywhere from one byte long to something like fourteen bytes long [e.g. within a 16-bit segment, LOCK ADD DWORD ESI:[EBX+4*EAX+12345678h],87654321h]. When the original x86 architecture was being designed, instructions were executed sequentially and it was expected that each instruction would take multiple cycles to execute. If it would take three cycles to execute an instruction, it wouldn't matter if finding the start of the next instruction also took three cycles. On the other hand, nobody nowadays wants x86 code to run that slow.

It's possible to design hardware that can run x86 instructions blazingly fast; 20 years ago, I would have thought that the complicated instruction decoding would have limited the x86 speed, but it really hasn't. What it has done, however, is require Intel and other chip makers to include some rather complicated translation and caching logic so that the first time a piece of code is run it gets converted into an easier-to-decode form and cached; if the code is run again, the translation can be skipped. All this logic makes for some very fast chips, but it also consumes power. Many of the lower-power ARM chips have much less front-end logic; they don't achieve the same performance as an x86 that includes such logic, but they achieve much better performance than an x86 could get without it.

supercat
  • 45,939
  • 2
  • 84
  • 143
  • so basically three points right? Carefully designed instruction ISA. So microarchitecture would be more pipeline efficient at even lower speeds. And you decide intel to have microcode cache instead of a macrocode cache right? That's why ARM could archive good speed in low flops. Am I right sir? – Standard Sandun Jun 25 '13 at 16:55
  • So it's nothing to do with fabrication or high-k material. ? – Standard Sandun Jun 25 '13 at 16:56
  • @sandundhammika: Perhaps I need to phrase things better: A controller based on the ARM processor can use simple circuitry fabricated with relatively straightforward fashion to achieve what is in many cases a useful level of performance. An x86 of comparable complexity would be much slower. One can do a variety of things to make x86 processors fast (adding fancier pre-decode cachine is but one of many), but at the expense of power consumption. – supercat Jun 25 '13 at 17:42
  • 1
    So the final answer is silicon size. Since ARM is doing that in compile time.So compilers would get complicated instead of energy hungry silicon wafer. – Standard Sandun Jun 25 '13 at 17:56
  • 1
    @sandundhammika Fundamentally size counts. All IC power consumption depends on number of transistor transitions needed per operation. So if you can do the same job with less transistors then less power is used. supercat is trying to explain why less circuity is needed. – user6972 Jun 25 '13 at 19:30
  • @user6972: There's also an economics issue, which perhaps I should expand upon: ARM controllers are frequently used in applications where current draw is a major design concern; x86 processors are frequently used in applications where speed is a larger concern. A designer choosing between two ARM controllers favor a variant that was half as fast but had a 33% lower quiescent current; one using between two x86 might favor a variant was 10% faster but drew twice as much quiescent current. – supercat Jun 25 '13 at 20:10
  • `20 years ago, I would have thought that the complicated instruction decoding would have limited the x86 speed, but it really hasn't.` This didn't age well... – Elliott Aug 16 '21 at 18:33
  • @Elliott: What do you mean? I think it's clear that the 20 years ago refers to the date of the post, and the text still reflects the contrast between my prediction and what actually came to pass. Further, I think that even in 2001 I would have expected that complicated instruction decoding would eventually limit x86 speed, even if not as severely as I would have expected in 1993. – supercat Aug 16 '21 at 19:06
  • @supercat, apologies. Maybe I'm wrong, but hasn't Apple's M1 chip already settled the argument that you can get better single-core performance with ARM? and even better again for multi-core? It seems that all manufactures are now scrambling to make ARM chips. However, you're an actual electrical engineer and I barely even know MIPS, so I'll defer to you (and probably delete my facetious comment). – Elliott Aug 16 '21 at 20:06
  • 1
    @Elliott: Feel free to leave the comment up. I think it's been clear for decades that supporting the x86 architecture requires adding extra circuitry which will consume extra power. For a long time, however, power consumption wasn't really a huge consideration in the marketplace of desktop-class processors. As mobile, laptop, and server markets represent an increasing fraction of processor demand, however, the market value of a processor that uses more energy than other processors to perform the same tasks is increasingly limited. – supercat Aug 16 '21 at 20:53