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I want to build a circuit that counts the on and off of a reed switch in a CD4040 binary counter.

I wired the circuit below in a breadboard. This has a debounced switch connected to a 74HC86 that when I press or release the button, output a pulse that goes to the CD4040 binary counter to count the number of presses/releases of the switch.

The circuit works OK when you press the button sending one pulse to the CD4040 but when I release the button it sends several pulses and the counter increase in more than one.

enter image description here

winny
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CBal
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    I would make sure your logic is properly decoupled with a ~0.1uF capacitor as close as possible to the power leads but it sounds like your debouncing network needs to be more robust although I don't think reed switches bounce more on opening than closing. – vir Aug 22 '23 at 21:01
  • I don't think R3 is helping your case. You don't need a pulldown for you uC input if you already are feeding it with a gate output. – Math Keeps Me Busy Aug 22 '23 at 21:03
  • @vir:I Thanks for you comment . I idn't draw it but the power supply is decoupled with two 100nF capacitor – CBal Aug 22 '23 at 21:06
  • @Math Thanks for you comment . You are right I took it out but still have the same problem – CBal Aug 22 '23 at 21:08
  • Next I would look at the ratio between your debounce, vs your delay caps. What if you decrease c1 to 10nF? – Math Keeps Me Busy Aug 22 '23 at 21:11
  • @Math Still the sam problem. Now something I don't undersatnd at all. I added a blue led in the output of he 74HC86 between the R3 and ground ro see the pulse of xor and the counting improves a lot but still with errors – CBal Aug 22 '23 at 21:43
  • I assume you are working on a breadboard and not a simulator. Do you have an oscilloscope? Could you post oscillograms of the inputs to your xor gate? – Math Keeps Me Busy Aug 22 '23 at 22:36
  • @Math . Yes I'm working with a breadboard but unfortunately I don't have an oscilloscope – CBal Aug 22 '23 at 22:59
  • @Math. Could you look at the debouncer. I'm thinking that something is wrong, because I took out the C1(100nF) capacitor and I didn;'t see any changes. Is it possible the debouncer is not well designed? – CBal Aug 22 '23 at 23:19
  • Let us [continue this discussion in chat](https://chat.stackexchange.com/rooms/148027/discussion-between-math-keeps-me-busy-and-cbal). – Math Keeps Me Busy Aug 22 '23 at 23:24
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    Sounds like debouncing time when opening the switch is not sufficient. Try making C1 1uF and C2 10uF – sai Aug 23 '23 at 02:06
  • The bottom bit of that counter will be "switch state at start" xor "current switch state". Unless capturing the switch state at start is important, you can also count falling edges, and use the current switch state as the bottom bit. – Simon Richter Aug 23 '23 at 07:23
  • If someone told you not to draw supply pins in schematics then stop listening to that person. It is _horrible_ practice not to draw them. Trying to hide documentation while in the process of producing documentation is senseless overall. – Lundin Aug 23 '23 at 08:03
  • Why don't you use a R-S flip-flop ? – Antonio51 Aug 23 '23 at 09:09

4 Answers4

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Keeping with the CD4000 series devices, try something like this:

schematic

simulate this circuit – Schematic created using CircuitLab

The \$C_1\$/\$R_1\$ differentiator will drive the NPN to 'reset' \$C_2\$ over and over, during bouncing. During that time the output goes high (stays high while bouncing around.) But once the bouncing settles, \$C_2\$ can rise over the threshold and the output pulse will end and go low, again.

You should get fairly clean pulses. However, I've made a lot of assumptions about timing. You would need to specify more details about the reed relay to get a better-matching arrangement of values. The main point here is about the topology, not the specific timing details.

These are active-HIGH pulses. If you want active-LOW then invert the output.

periblepsis
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The problem with your circuit is that both inputs see a slow rising voltage at the same time.

Use a gate with a Schmitt input instead eg 74HCS86. Unfortunately this IC not available in DIP so you'll need to solder it to a carrier if you want to use it with solderless breadboard.

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I have implemented your debounce and delay sections of your circuit in CircuitLab so that we can simulate them. I have used a relay instead of a switch to automate switching in the simulation.

schematic

simulate this circuit – Schematic created using CircuitLab

And here are the simulated outputs.

enter image description here

Notice that Out1 is not in the form of a square wave. When the switch/relay closes, C1 immediately discharges, and Out1 falls to 0V. When the switch opens, C1 charges quickly to about 2.5V. Then R1 and R2 divide the voltage between them until C2 charges up and the rise in Out1 from 2.5V to about 5V is much more gradual.

To fix this, we will increase the resistor R2 by a factor of 10, and decrease the capacitance of C2 by an equal factor of 10.

schematic

simulate this circuit

enter image description here

Math Keeps Me Busy
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    Excellent Math!!. I tried it in the breadboard and works perfectly. Thank you very much for your help! – CBal Aug 23 '23 at 22:03
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The debouncer won't work, as mentioned in other answers.

The following circuit would work:

schematic

simulate this circuit – Schematic created using CircuitLab

Four inverters or two NANDs extend the pulse, and then the XOR gate does edge detection.

When the supply is 3V..3.5V, the LEDs can be attached directly to CD4040 outputs, without series resistors. At such low supply voltages, the standard 4000B-series CMOS outputs acts as low current sources.

With 5V or higher supplies, a series resistor is necessary.

The switch debouncing can use either an Schmitt-trigger input inverter, or a Schmitt-trigger input NAND gate. Both are shown, but only one would be used - depending on what chips you have access to.

The inverter can be 40106, 14584, or 4584.

The only 4000-series Schmitt-input NAND I know of is 4093. For the NAND, connect only one input to the switch. The other input should be held at VCC. Do not connect both Schmitt inputs to the switch - their thresholds differ a bit and there may be glitches on the NAND output.

schematic

simulate this circuit

Another variant of the circuit uses only Schmitt-input NANDs, so saves one chip:

schematic

simulate this circuit

The outputs of NAND2 and NAND3 are complementary. C2 and C3 differentiate their outputs, and generate a positive-going pulse upon a switch state change. One pulse on switch press, another on switch release. These pulses are combined with NAND4 and provide a press/release clock output.

  • In the last schematic, both inputs to NAND4 (pin numbers - ?) are held low with no input. When SW1 is pressed, there will not be a pulse output because even though the output of NAND3 goes high, the other input of NAND4 goes from low to lower - GND to 3.3 V below GND - because C2 was charged up to 3.3 V and R2 had the lower end at GND. – AnalogKid Aug 24 '23 at 16:23