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I tried to simulate (before building it) a double edge detector circuit that I found in this post.

enter image description here

When I simulated it, I got a decent pulse when I closed the switch but when I opened it, I got a spike more than a pulse.

Is it possible to improve the circuit to get a better pulse when I open the switch?

The pulse is sent to a 4040 binary counter.

JYelton
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CBal
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  • Your circuit doesn't look anything like [Olin's circuit](https://electronics.stackexchange.com/a/270908/11683). – Dave Tweed Aug 16 '23 at 21:01
  • Carlos, what you want (reading tea leaves; one of those tea leaves says your input is an `actual` switch and not some other kind of input) is something that will first `debounce` the switch. Otherwise all you will get is a very, very glitchy output because switches do bounce a bit. And if you get a pulse for every unwanted bounce, then you are in a heap of trouble. Once debounced, then something can be done. I'm not interested in suggesting anything (even Olin's circuit) without hearing more about what's driving this. If a `real` switch, then debouncing is probably needed and can be combined. – periblepsis Aug 17 '23 at 04:44
  • In case it isn't clear, [here's a simulated switch bounce](https://i.stack.imgur.com/z5JyC.png) to get you thinking more closely. Which of the three areas pointed out would you consider to be the moment of the falling edge? (The last one might be `after` things have settled down.) – periblepsis Aug 17 '23 at 07:23
  • thanks periblepsis for your comment. Yes in the origianl circuit the reed switch was debounced but I forgot to include in this circuit. I added it but I'm still recieve the same signal – CBal Aug 17 '23 at 13:41
  • @carlosbalseiro Does this mean that you already have a debounced switch output? If so, what exactly is the output? TTL? CMOS? Discrete BJTs? Discrete FETs? It can't just be a switch if it is debounced. So what is that circuit, exactly? – periblepsis Aug 20 '23 at 10:36

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The added input stage Q4 is the problem.

The circuit assumes a low impedance source from wherever the input comes from. The input signal has to be able to yank up C4 and yank down C6 quickly.

With the Q4 stage, the transistor can yank down C6 just fine, but R3 cannot yank up C4 fast enough to get the desired output.

AnalogKid
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  • Thanks for you answer. I nodified R3 but nothing changes. Could you guide me a bit more? – CBal Aug 17 '23 at 13:45