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I’m using a 40 MHz TCXO to drive the clock input of an A/D chip. The output of the TCXO is DC coupled 1.8 V LVCMOS and it is specified in the TCXO datasheet that the output load is 10 pF // 10 kOhm. The clock input of the A/D should be AC coupled and shouldn’t exceed 1.5 V peak to peak (Pk-Pk). Moreover, the clock input of the A/D chip has a 10 pF capacitor in parallel with a 10 kOhm resistor (inside the chip).

As shown in the attached figure, I’m using a 39 pF capacitor (C1) to AC couple the output of the TCXO and to reduce the voltage swing across the A/D clock input to 1.43 V Pk-Pk. Please note that C2 and R1 are inside the A/D chip and I don’t have control over them.

I have the following question: using the attached figure, the impedance seen at the output of the TCXO is 7.959 pF // 10 KOhm while in the TCXO datasheet, it is mentioned that the output load is 10 pF // 10 KOhm. Is the circuit in the attached figure OK? Or Should I update it so that the impedance seen at the output of the TCXO is 10 pF // 10 KOhm while meeting the AC coupling and voltage swing requirements? Kindly advice. Figure

Davide Andrea
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    To get a confident answer to your question, you should provide links to the datasheets for the TCXO and the A/D. – The Photon Jul 29 '23 at 15:01
  • generallly for a CMOS output, the capacitance spec is a maximum value, but I'd like to see the actual datasheet before posting that as an answer. – The Photon Jul 29 '23 at 15:02
  • Thanks for your feedback. Unfortunately, I can’t share the datasheets. However, I can share some information: the specified nominal output load (in the datasheet) of the TCXO is (10 pF // 10 KOhm) with a plus 10% maximum and negative 10% minimum. The ADC clock input has a 10 pF capacitor in parallel with a 10 KOhm resistor and the variation of these input values is not specified. The clock input of the ADC should be AC coupled with a maximum value of 1.5V peak to peak and a minimum value of 0.8V peak to peak. – user345919 Jul 29 '23 at 17:28
  • Also, the output of the TCXO is 1.8 V LVCMOS with 0.9*VCC (1.62 V) minimum high output value and VCC (1.8 V) maximum high output value. 0.1*VCC (0.18 V) maximum low output value and 0 V minimum low output value. – user345919 Jul 30 '23 at 06:00
  • Sorry, without the datasheets I don't see how I can tell you anything useful. – The Photon Jul 30 '23 at 16:53

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