Why do we allow discontinuous conduction mode (DCM)?

Question

I know that DCM occurs when ripple is greater than the DC component, but why would we allow ripple to be greater than the DC component? Don't we see ripple as something undesirable and try to minimise it? Does DCM occur because there are some situations where we are unable to minimise ripple, or is DCM actually desirable in certain situations?

Answer 1

I know that DCM occurs when ripple is greater than the DC component,

Only if you allow it. With passive rectification, it is inevitable, but with active (synchronous) rectification, it is optional.

but why would we allow ripple to be greater than the DC component?

Some loads are highly variable, some even going all the way to zero DC load current.

Don't we see ripple as something undesirable and try to minimise it?

Remember, we're talking about current ripple, not voltage ripple. There is a relationship between them, but it can be managed. At the load, we're normally more concerned about voltage ripple.

Does DCM occur because there are some situations where we are unable to minimise ripple,

Yes. For a given inductor and switching frequency, there is usually a minimum pulse width, limited by the switching element and/or its drivers.

or is DCM actually desirable in certain situations?

DCM is usually a lot more efficient at low power levels. This is especially important in battery-powered systems that must deal with a wide range of load current.

Answer 2

Dave's answer is very good, but I think it's missing a key point.

To reduce ripple and/or maintain continuous current mode often requires using a high inductor value. A higher value inductor is typically larger and more expensive than a lower value one.

Sometimes engineering is about designing the highest-performance system you can. But more often it is about designing a system that meets all requirements at the lowest possible cost. In that case you might prefer to reduce the cost of your inductor rather than reduce ripple, once the ripple has been lowered to a level that is acceptable in your system.

Answer 3

I know that DCM occurs when ripple is greater than the DC component

This statement sets the scene for the question. The OP is considering a converter circuit (buck, boost, flyback etc.) that is capable of running in DCM. This isn't the case with a synchronous converter; it always operates in CCM and cannot operate in DCM unless it is emulating a diode but, aren't we missing the point here; it's about DCM versus CCM and not about the particular solution.

So, I'm basing my answer on a switching transistor and a flyback diode because that is common to a lot of buck and boost circuits.

Does DCM occur because there are some situations where we are unable to minimise ripple, or is DCM actually desirable in certain situations?

DCM occurs when the output load current is insufficient to maintain operation in CCM. CCM is a natural evolution of DCM when the load current reaches a value that exceeds the boundary conduction condition.

Hence, DCM is necessary (out of our hands) when the load current is small. Above a certain threshold of load current, the converter will operate in CCM, below that threshold it must operate in DCM.

I know that DCM occurs when ripple is greater than the DC component

It's better to consider that DCM is inevitable at low load currents.

However, it's noteworthy that even in CCM, the ripple current (\$I_{PEAK}\$ minus \$I_{VALLEY}\$) can be larger than the average inductor current. In other words, the situation of the ripple current being greater than the average current isn't exclusive to DCM. Here's a calculator example (from my basic site) of a boost converter operating in CCM but, if you crunch the numbers, the ripple current is larger than the average current: -

• Ripple current = 27.029 amps - 7.880 amps = 19.149 amps
• Average current is 17.455 amps
• In other words in this clear CCM example, ripple current exceeds average current

Why would we allow ripple to be greater than the DC component?

We can't avoid it; it is not a choice we can make for low load currents.

Don't we see ripple as something undesirable and try to minimise it?

Yes we do but, we have no choice at low load currents. And we have no choice because the slopes of the current are not alterable without altering either the input voltage or the output voltage.

This means that for a steady state situation of constant input voltage and constant level output voltage, we are constrained to di/dt slopes that are immovable. I modified a diagram from my basic website to show you what I mean. It applies to basic buck and boost converters: -

The picture shows discontinuous current mode but, the slopes are the same should the load current increase and the converter enter CCM.

The constraint is due to a rearrangement of the well-known formula \$V = L\cdot\frac{di}{dt}\$

Answer 4

There are already excellent responses to this question. Still, I just wanted to mention another possible reason a designer may want to deliberately design a power converter to operate in DCM vs CCM. At the boundary between DCM and CCM is a condition called "Boundary Conduction Mode", BCM (also called "Critical Conduction Mode", but since that has the same acronym as "Continuous Conduction Mode" I prefer the term "BCM").

In this mode, the switch is deliberately toggled the instant the falling current reaches zero - that is, the period during which the current is held at zero becomes zero. So the current in the inductor looks like a triangle wave with its valley touching zero, and its upper point is determined by the control scheme:-

Reference: The image above is from the publication here: https://www.ti.com/lit/an/slva057/slva057.pdf

This mode offers the same advantages and disadvantages as DCM as compared to CCM, eg: BCM has lower switching losses than CCM (but without the "ringing" that may be present in DCM), but BCM has higher conduction losses than CCM for a given average current); however, there is one feature of BCM that makes it desirable in some cases, viz:

The average of the inductor current is directly proportional to the voltage that is charging (increasing) the inductor current.

By controlling the charging time of the inductor current, the average value of the current can be controlled, thus the resistance value presented to the charging voltage can be controlled.

This feature is particularly useful when the current must follow the input voltage, which is exactly what is required for line-current shapers that are intended to be connected to the mains supply (which is a sine-wave voltage source) and draw current from it in the same manner as a resistive load would, refer image below:

Reference: The image above is from the publication here: https://www.ti.com/seclit/ml/slup390/slup390.pdf

Just a couple of examples where line-current shapers are used: the power supply in your computer, and the EV charger installed at the charging station; both are required to present an almost perfect resistive load to the mains network. Now, that is not to say that a particular product, such as EV charger, would actually use a BCM converter to do the line-current shaping, there are many other ways to achieve line-current shaping, and many design issues that need to be considered before deciding which method to implement in any given application.

This feature is so desirable that there are many patents on various aspects of it, here is just one example: https://patentimages.storage.googleapis.com/cb/9b/bc/b68ab9948a1590/US8604767.pdf

Answer 5

As of writing, the existing answers are generally excellent about the nature of DCM/BCM/CCM, but ripple itself hasn't been discussed much yet. So I'd like to add some about that here.

Generally, ripple is only problematic above some threshold, determined by component ratings and characteristics.

Ripple, in and of itself, is not problematic, when components can be freely chosen for low loss (less power dissipation per reactive power being cycled), or large value (less reactive power being cycled in the first place).

Losses, in turn, may be low relative to component ratings (ripple current, power dissipation). And, if efficiency (of a given design) is more than adequate, well, that's all you need to do.

Note that reactive power is given by the product of AC voltage and current across/through the (reactive) component. If we increase the value of an inductor (for given AC voltage), AC current decreases; if we increase the value of a capacitor (for given AC current), AC voltage decreases; in both cases, less reactive power is circulated.

Q factor is defined as the ratio of real to reactive power in a component (among other definitions). Now, this is a convenient single-frequency steady-state definition, and it does not strictly hold with harmonics -- so I am using this definition loosely here. But, given that the square wave voltage at the switch has harmonics that go as 1/N, and the triangular current waveform goes as 1/N², the reactive power due to harmonics drops quickly with number, and the fundamental constitutes >90% of reactive power in switching converters. (And, losses never rise as quickly as P ~ F³!) So, given that our estimates might be out by 10% give or take harmonics, this is acceptable as an approximation.

If our available components have only limited Q factor (As typically the case for commercially available components: they offer good, but not fantastic, Q factors), and limited power dissipation rating (or allowable temp rise per component, or of the whole module, as the case may be), then we will be forced to increase component values to reduce reactive power (and thus real power dissipation) to meet that constraint. Larger values will take up more space.

Alternately, we can require components with high Q factors. These will generally be custom-made parts, using more expensive materials, and they may still require larger sizes to achieve a given Q factor at the given frequency.

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For more of a worked example, consider a buck converter of 10V input and 5V 1A output:

If we choose DCM, we have on the order of 5VA of reactive power cycled through the inductor. If the inductor has a Q factor of 20, it dissipates 5/20 = 0.25W AC losses. If it has a 6 x 6mm footprint, its temp rise will likely be under 40°C. If an efficiency of 80% minimum is required, then -- give or take losses elsewhere -- we're probably done. (If non-synchronous buck, then expect approx. 0.4V drop on a good schottky diode, at 1A average, for a bit less than 50% of the time, or 0.2W. If synchronous, use total MOSFET conduction losses. We can choose Rds(on) for even lower losses.) Note that input and output ripple losses can be minimized by using relatively large, low-ESR ceramic capacitors (say 10 or 22µF in 1206 or 1210 chip size). Perhaps smaller or cheaper capacitors could be used if the ripple were lower, but it won't be much lower at the input (buck input is "100%" current ripple because it's being hard switched on and off regardless of inductance), and we might choose a lossy output capacitor type for other reasons anyway (control loop compensation by ESR zero, dampening of PDN (power distribution network), etc.).

Capacitors of this size [1206, 1210 chip] are affordable enough that their effective (per-part) assembly cost might be significant, meaning there isn't much point in trying to optimize the design say by using a pile of 1µF 0805s instead. Or, cost of the overall assembly, or the cost of certain other major components, may dominate the design, making these a low priority for optimization. In short: it's good enough; send it!

Contrast with a 48V input, 12V 50A output buck converter:

If we choose DCM, we need on the order of 600VA reactive power, and an inductor of even Q = 100 will dissipate 6W already. Now, a 50A inductor will need to be pretty big anyway, so it's not unlikely it could dissipate this much power; but it will be expensive, most likely not a powdered-iron type material, but gapped ferrite. Suppose this is part of a battery management system (charging, power distribution, etc.), and so high efficiency is demanded; it might also be packed into a module with limited size and heat dissipation, dictating the high efficiency. Maybe it needs to be >98% efficiency, or maximum 12W total. 6W is a huge part of that, and leaves very little room for conduction and switching losses, or even drive and control losses, frankly (which are usually well under a watt, but if you're cutting things this close--?). This would be a risky choice for the inductor.

And to handle the 50A ripple at the input and output, quite large capacitors are required. And at the 48V input, ceramic capacitors don't do very much -- even 1812 and 2220 size chip X7Rs don't offer a whole lot of capacity at this voltage (couple µF). We would likely choose 63/100V aluminum polymer here, which are suitable for higher ripple current than electrolytic are. (Some ceramics would still be used, to help out at high frequencies; not a significant fraction of the total, though.) Same at the output, though since the output is triangular wave current ripple, perhaps regular electrolytics are acceptable there (still, a lot of them required).

Whereas with CCM, we can achieve lower losses with a more modest inductor type: suppose we choose 30% ripple fraction, which reduces reactive power by about three times; we can halve inductor AC losses while still using Q ≥ 67 -- our available selection has expanded, perhaps including a powder composite type, or a flat-wire edge-wound ferrite type. The lower output ripple certainly makes electrolytics feasible, and the input likely still uses aluminum polymer (the rating will be slightly relaxed, as it's "only" ~"130%" ripple, versus the "200%" in DCM.) And now we've freed up room for more DC losses, capacitor losses, and conduction and switching losses, likely making the overall design feasible.

Or, consider a converter operating at 400V or more:

We aren't generally too concerned about capacitive losses at low voltages, but switching losses due to capacitance, rise significantly with voltage (junction capacitance stored energy goes as V²)*. This can make CCM less attractive than it would otherwise be, as the hard turn-on switching dissipates significant power. That is, even for infinite C_IN, C_OUT and L_SW, there is some minimum unavoidable switching loss.

*VERY roughly speaking, because MOSFET C_oss(V_DS) (or diode C_J(V_R)) scale with voltage rating, but not quite proportionally so; and the shapes of these curves vary dramatically.

Thus, DCM (ZCS condition), or better yet BCM (ZCS+ZVS condition), can offer lower switching losses; but this comes at the expense of needing a very good inductor, and good enough capacitors.

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There are also other constraints: the inductance can't be increased unilaterally, but the output capacitor value is related to the inductor value by load step performance. Note that, even if the controller can react instantaneously to a load change (it can't of course, but good designs can react in a modest fraction of a switching cycle), the output impedance is at least \$Z_0 = \sqrt{\dfrac{L_\textrm{SW}}{C_\textrm{OUT}}}\$, and so as L goes up, C has to remain at least some minimum corresponding amount to maintain acceptably low Z₀. This is a major limiting factor on voltage mode converters, like traditional TL494-based designs. Current mode controls achieve frequency response closer to F_SW and so are generally preferred, among other features.

Also, there is one more strategy we can employ: split the converter into multiple channels, to share the ripple current across more components. The channels can be phase-shifted so that ripple currents partially (even completely) cancel out.

By canceling out ripple currents, much smaller capacitors can be used at both input and output. This can offer significant space savings. The downside is greater circuit complexity, and fewer options of controllers/regulators to choose from.

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In summary, it's an entire discussion, at the intersection of basic component ratings, on both the input and output of the converter; of overall efficiency, cost, and size; and various other constraints. Generally, high ripple is acceptable on small designs where power density isn't such an issue (surface area to volume ratio is favorable), or designs where efficiency in general isn't a big concern (which often includes small designs). It's generally less acceptable on larger designs, where overall power dissipation / temp rise may be a design factor, but also isn't insurmountable, given suitable choice of components.

Answer 6

For any given combination of input voltage, output voltage, and frequency, and inductance, there will be a certain unavoidable difference between the minimum and maximum current levels on the inductor if it's operating in continous mode. If the amount of current drawn from the load is more than about 50% of this difference, then the current can vary between (load current minus half the difference) and (load current plus half the difference) without ever reaching zero. If the amount of current drawn from the load is less than 50% of the difference, then unless one increases the switching frequency to reduce the difference, current will necessarily drop to zero.

From an engineering perspective, one can expect that a certain amount of energy will be lost in each switching cycle, but the required switching frequency to maintain conduction with a given level of inductance would approach infinity as the load current approaches zero. To avoid charging the output cap to an excessive voltage, the peak transfer current during each cycle should be limited to twice the load current, but if that limit is very small it won't take very long for the inductor to transfer all of its energy into the load cap.