What affects the unity-gain bandwidth (UGB) of a symmetrical OTA?

Question

I am trying to determine the sizing of transistors in the OTA as shown below. A strange thing I found earlier was that a small output impedance of M5 would cause a much smaller GBW than designed, as explained by sai in a previous question.

However, as I increase the widths of M7 and M8 (from 6uM to 9uM), while keep their lengths unchanged (19uM), the UGB decreases again (from 713k to 706k). My initial guess was that the output impedance of M7 decreased (from 25M to 21M), so some of the signal current failed to pass through M7 to M8, causing the overall transconductance decreased.

The problem is that increasing the widths of M3-M6 increases the UGB (can be 730k if the widths are set 9uM), which contradicts the "current wasted on small output impedance" theory, as the output impedance of M3-M6 also decreases when their widths increase.

My question is: What affects the UGB in this case? Why does increasing the width of the NMOS and PMOS produce opposite results?

I also attached the DC simulation result below, for W7 and W8 = 6uM,

and for W7 and W8 = 9uM

Answer 1

In your previous question, you had a biasing issue and hence there was ~19% error between your calculation and simulation.

Once you keep RDS high enough that the overall GM matches your calculation, GM does not strongly depend upon RDS anymore. That is why eventhough you change PMOS sizes so much, the change in UGB is negligible (~1%). The change could even be due to the capacitances in the circuit which is one other factor that determines the UGB of the amplifier.

Even when you change the NMOS sizes, the change in UGB is quite small (~2.4%). Difficult to say why exactly this change happened. May be your input pair RDS improves and that causes a slight improvement in GM.

You'll have to check GM & node capacitances in simulation in both NMOS and PMOS size change cases and figure out. However, for such small change in UGB, I am not sure this exercise is worth it.