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I have a verilog-A module, and I've created an expression that is comparing two signals. The parser is saying that the port/node "requires access function" and throwing a compile error.

What's an "access function" in this error message?

stevesliva
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1 Answers1

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What this means, in short, is that you need to wrap a signal in V() or I() to get the voltage or current because you're using a type that can be either in an expression.

For example:

input IN; electrical IN;
real vth = 0.5;

analog begin
   @(cross( IN - vth ))

Error: @(cross(IN- vth )). Because IN is electrical, it has both current and voltage, and the code is specifying neither access function.

This is okay: @cross(V(IN)- Vth)

This is made clear in the Verilog AMS Reference Manual discussion of "Continuous Signals":

to access a continuous signal it is not sufficient to simply give of the name of the node or port that carries the signal, you must embed that name within an access function that is used to access the component you want. With electrical signals, there are two access functions: V and I.

It seems to be that the "access function" term is a bit generic, but that seems to be a bit of a placeholder for there to be other signals of other disciplines (like Magnetic or Thermal) with other access functions. I can't find examples other than V() and I() though.

stevesliva
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