How do you design a crystal oscillator circuit for STM32F4 MCUs

Question

I am trying to choose a crystal and accompanying capacitors and resistors for use with an STM32F4 MCU's high speed external clock. I've decided to use a crystal with 8MHz frequency and 10pF load capacitance because it seems to be a common and reasonable choice (correct me if I'm wrong).

I'm following this application note from ST: AN2867 which is supposed to tell me what other bits I need, 2 capacitors, \$C_{L1}\$ and \$C_{L2}\$, and possibly a drive-level limiting resistor \$R_{Ext}\$. This is where my confusion begins. The equation for determining the capacitors is given as: $$ C_L = \frac{C_{L1} \times C_{L2}}{C_{L1} + C_{L2}}+C_s $$ where \$C_L\$ is the load capacitance of the crystal, 10pF, and \$C_s\$ is the stray capacitance of the MCU OSC pins and the pcb. The datasheet for the MCU says that the capacitors are usually the same size and in the 5 to 25pF range, it also says that 10pF can be used as an estimate for \$C_s\$ The problem is: there is no solution with \$C_L = 10pF\$, \$C_s = 10pF\$ and \$C_{L1} = C_{L2}\$.

Anyway I decided to estimate \$C_s = 5pF\$ so \$C_{L1} = C_{L2} = 10pF\$ is a solution, but that's basically just a guess now, how do I get the proper values?

Another problem arises when trying to calculate \$R_{Ext}\$ the application note says that the resistance can be estimated with: $$ R_{Ext} = \frac{1}{2 \pi F \times C_{L2}} $$ where F is the frequency of the crystal. But with an 8MHz crystal and the hopefully somewhat close to correct 10pF capacitor this comes out as a 2k resistor. Now it's just an estimate, but that seems very high to me, there is another section that specifies that for a crystal to be compatible with the chip and oscillate properly this inequality must be satisfied: $$ G_{m\_crit\_max} > 4 \times (ESR + R_{Ext}) \times (2 \pi F)^2 \times (C_0 + C_L)^2 $$ Where ESR is the equivalent series resistance of the crystal, \$C_0\$ the crystal shunt capacitance, \$G_{m\_crit\_max}\$ is 1 mA/V as specified on the datasheet and the right side is \$g_{mcrit}\$: the minimal transconductance for the thing to work.

How does that make sense? Even if I found a crystal with 1 ESR and 1pF shunt capacitance, which is probably not possible, at that value for \$R_{Ext}\$ it would still not be even close to being compatible with the STM32F4, clearly I'm doing something wrong here but what?

Answer 1

For a parallel-resonant circuit to work, your crystal's load capacitance needs to be significantly higher than the stray capacitance. I'd start with \$C_L = 20 \mathrm{pf}\$.

\$C_s = 10\mathrm{pf}\$ seems a bit high to me -- but they know their part, and they may be choosing that to make sure that your first effort works out of the chute, if at a slightly higher frequency than you designed for. It's typical, if you really need the precision, to fine-tune the load capacitors in production.

Answer 2

A crystal with only 10pF of CL might be an awkward selection as you have calculated. The crystal design appnote does list some specific crystal parts so you can see what kind of range of CL or ESR will work in practice.

If you select a crystal with say 18pF of CL, and use 22pF capacitors, 11 pF plus 7 of stray approximately matches the 18pF requirement, and the Rext resitor will likely be in the 500 ohm region. However, Rext is often just left off but you can use a 0 ohm resistor, as it will help you to experiment and replace it with suitable value later if needed.

And like the formula says, when frequency, CL, ESR or Rext go up in value, it will get closer to critical margin, so don't overdo them. Feel free to choose a crystal with suitable range of all parameters to have suitable capacitors and enough margin.

Answer 3

If you believe the 10pF Cs figure (and ST seem to believe it, based on the values chosen for one of their eval boards I checked- albeit for an HC-49 crystal in a socket), you should pick a crystal with a higher load capacitance, such as 20pF. There are plenty available.

The series resistor is intended to prevent overdriving of the crystal and is seldom necessary for an HC49 crystal.

If the actual Cs is more like the typically suggested 3-5pF then the high speed oscillator will run very slightly faster than optimal, which is seldom much of an issue.