I'm using an SDR which uses and ADF4002-based PLL with its REFIN input AC-coupled via a 0.1 uF capacitor to an external input. I'd like to connect an external reference clock to it, but I'm unsure how to check whether the absolute maximum ratings of the ADF4002 would be exceeded.
From the datasheet, the ADF4002 has an absolute maximum REFIN input current of 100 uA, and has a DC-equivalent input resistance of 100 kΩ. My reference clock puts out around 32 mA, which at 10 MHz is 13.3 dBm of power.
simulate this circuit – Schematic created using CircuitLab
How would I go about working out what current would flow through REFIN, and check whether the absolute maximum ratings would be exceeded?
