I am using isolated SMPS power module in my PCB layout. I found good examples about layout here. https://www.powerctc.com/en/node/5139. I have completed routing the isolated SMPS power module from the power layer of the PCB. The upper layers and the lower layers are empty. I was wondering if for heat dissipation, if I parallelize this power pour in other layers and connect them with a via, will this generate noise? Is this a good practice?
You paid for all the copper and most PCB manufacturers will allow a lot of vias before charging you extra, so by all means make the most of it.
Suppose you have a four layer design with the following stackup:
I would recommend you use all the empty areas on top and bottom layers to do fill/pour like this:
Connect your pours throughout with vias, especially important for any islands.
In theory you'll get better thermal conductance with parallel planes, or haiving GND in between to even form some additional capacitance. Unfortunately though, the package you have will dissipate most of the heat through it's surface, not through the PCB, so there isn't much you can do.
Stiching the planes with vias will help keeping the planes in the same potential and eliminate structures that might act as antennas.
Connect the V_SUP- also directly to the SMPS pins, not through the mid-layers, to minimize the inductance from the caps to SMPS. Consider adding a ceramic cap closest to VSUP+ and VSUP-.
