Can someone explain how an emitter follower used as an AM detector (shown below) actually works?
I don't get how a (theoretically) linear system like an emitter follower would work as a detector when detection effectively involves converting an AC signal to a DC signal (I understand it's not usually thought of that way, but as far as I know, that's basically what's happening,) and neither does my electronics professor. He was even quite baffled to see my LTspice simulation of it work.
With no input signal, the bias network sets the base voltage to be about 3.4V. The emitter voltage is set to around 2.8V (depending on temperature) from a small amount of current coming from the emitter- the transistor is just barely in the active region. R2 is chosen here to ensure this- if it's too small then the transistor will be too far in the active region and the circuit will work more like a normal emitter follower.
Now consider what happens if the input voltage is raised sharply. Emitter current depends very strongly on Vbe, and the transistor will provide a large amount of current to keep Vbe from increasing too much. So it will very quickly respond to a rise in the input voltage.
On the other hand, consider what will happen if the input voltage is decreased sharply. The transistor was barely in the active region to begin with, so it will now be in the cutoff region. No current can go through the transistor, so the only place for current to go is through the resistor. So the voltage will decrease with an RC time constant of RC, 200 microseconds.
In short, the circuit can quickly increase its voltage but can only slowly decrease its voltage. In other words, it acts exactly as a peak detector. With proper choice of an RC time constant, it will follow the peaks of the modulated wave while filtering out the higher-frequency carrier wave.
You are correct that if the emitter follower were employed as a linear element, it would be unable to perform AM demodulation. However, it is not as linear as you think.
This NPN emitter follower has asymmetric behaviour, in which it is able to source lots of current, but unable to sink any. This means that if you raise base potential, the transistor can easily "pull up" emitter potential, even against a very low impedance to ground. But the reverse situation is very different, in which the transistor has no ability to pull emitter potential downwards, regardless of how low base potential drops.
If the emitter "load" is capacitive, a rising input can therefore easily charge the capacitor to slightly less than the base potential, because the transistor is able to become a very low impedance current path to the positive supply. When the base falls again, though, the best the transistor can do is to switch off, removing that charging path, but this cannot cause the capacitor to discharge. Discharging can only occur via some other route, in this case a resistance in parallel with the capacitor. In other words, the emitter follower becomes a "peak detector", with an output rising very quickly with input, but falling only as quickly as the emitter resistor/capacitor permits.
It is therefore the asymmetry of the emitter follower's sinking/sourcing ability, combined with a capacitive load, that produces the non-linear behaviour required to demodulate an AM signal.
AM modulation is basically to multiply the carrier (C) and message (M) signals. And the result is, simply, the carrier signal "enframed" by the message signal:
Above shows a 1 kHz signal (with DC offset) modulated by a 100 kHz carrier.
Demodulation is simple:
Here's a principal schematic of an AM demodulator:
simulate this circuit – Schematic created using CircuitLab
The diode conducts when the input signal is higher than its conduction threshold (Vf) and R-C pair simply filters out the unwanted high-frequency carrier. The output is the message signal, but less in amplitude (because of the diode).
The circuit shown in your question is no different than the principal schematic above: D1 is replaced with the BE junction of the BJT (Q1). But compensates the voltage drop with amplification (remember, its voltage gain is quite close to 1, hence the name "follower" or "buffer"). R2-C2 filters out the carrier, and C3 removes the DC offset. And the output is the envelope (or message).
Here's an example circuit, for those who are interested:
An AM detector is the function a (so-called) peak detector realizes within an AM demodulator.
The peak detector is a fundamentally non-linear circuit (but it has some sections in time domain where it works as a linear circuit, as you can see).
The emitter follower is the common way to call a BJT voltage amplifier with a gain of 1 V/V (or a buffer). When working in this mode, it is meant to work as a linear circuit.
However, to design a peak detector (or better said, an amplitude detector), we need something that is able to rectify in order to obtain either the positive or negative side of the message signal and filter out the carrier signal. A diode can do this, and a BJT can also do it, as one can reduce its VBE voltage to turn it off.
The key is that the RC at the emitter slows downs the response of the BJT, thus filtering out those fast downward swings. The emitter wants to follow those downward swings before it switches off, but its time constant is too high, thus effectively filtering out those downward going swings of the AM carrier.
If you look at the simulation, you should see that the positive input voltage peaks turn the transistor on because the input voltage exceeds the voltage stored to the output capacitor by Vbe drop and so the peak voltage is stored to the capacitor that then discharges slowly.
The transistor does not conduct if the input voltage is below the Vbe drop from the peak voltage stored in the emitter so the capacitor discharges slowly through resistor.
There are two key points. First, when the base goes lower than the emitter, no current flows. Second, R2/C2 form a storage element, in this case with a time constant of 0.2 msec. A positive peak will inject current into the RC, raising the voltage to about 0.7 volts less than the peak. When the input drops, the voltage across the RC will not follow it, (since the emitter-base junction is reverse-biased) until the voltage has bled off enough to forward-bias the junction.
I assume you're using a frequency of 100 kHz or 1 MHz. Try dropping the simulation frequency to 100 Hz and see what happens. Or reduce C2 to .01 nF.
As stated in other answers and comments, but not always fully clearly:
The "magic" is
The storage of (the average input voltage - Vbe) in C2.
Setting the R2.C2 time constant such that carrier is rejected but modulation is unaffected.
ie An emitter follower "pulls up the load actively" on positive input levels large enough to turn the transistor on.
The output is "pulled down" during lower input levels ONLY by the time constant delayed R2.C2 load.
So pull up follows short term positive peaks - but pull down is low pass filtered by RC
The voltage on C2 tracks the average (Vin-Vbe), and the transistor will then only conduct when Vin rises above its recent average value.
The time constant of R2.C2 is set to be
Significantly longer than the period of the carrier frequency, so the DC voltage tracks Vin average slowly. When Vin is > Vin_average the transistor conducts.
Significantly shorter than the period of the modulation frequency - so variations due to modulation positive peaks above Vin_average produce associated emitter current and so voltage variations.
Simply saying, the NPN acts like a diode. It is not linear at all. It does go into cutoff region, forming a peak detector circuit as many said.
