The steps are incomplete - there are precursor steps before the list even begins with step 1.
A more detailed list would look as follows:
- Start with a doped Si wafer - those can be bought already doped.
- Thermally grow 0.3μm of [silicon] oxide on it - by treating it with O2 plasma for 5 minutes.
- Spin-coat thin film on the wafer.
- Anneal on a hot plate, precipitating ZnO.
- Repeat steps 4 and 5 to get a sufficiently thick layer.
- Apply a shadow mask - it can be a PCB stencil at the large scales of the devices tested.
- Sputter aluminum through the mask onto ZnO.
Alternatively, you could:
- use photoresist mask instead of a shadow mask
- use some aqueous aluminizing solution instead of sputtering, as long as it wouldn't destroy the ZnO layer.
Steps 1 and 2 can be "skipped" by buying a pre-doped, oxide-coated wafer made to your specifications.
The biggest problem is, though that the gate is the bulk doped semiconductor of the wafer. I.e. the entire wafer is one large bulk gate. In other words: if you'd want more than one transistor made that way you'd have to either
dice the wafer to get a whole bunch of single transistors that you'd then either package individually using conductive bonds for gate connection, or conductively bond the dies to a hybrid substrate - perhaps even a PCB, or
pattern the gates, so that the entire wafer isn't just one interconnected gate
For the latter, you'd have to (semiconductor people please correct me - I'm an amateur only):
- Start with a Si wafer
- Apply photoresist pattern for the gates
- Ion-implant (selectively dope) the gates
- Strip photoresist
- Grow oxide
- Apply photoresist pattern for gate connections onto oxide
- Etch oxide away to expose gate connections.
- Strip photoresist
- Apply photoresist pattern for the zinc oxide film
- Deposit the ZnO layers
- Strip photoresist.
- Apply photoresist pattern for the metal layer - or a shadow mask.
- Deposit metal.
- Strip photoresist (if photoresist was used).
I'm not sure if the gates would need additional insulation, or would bulk undoped Si be good enough for that with adequate spacing.
At that point, going with a more standard CMOS process would be probably no harder, given the number of steps involved. If you don't care about CMOS, then NMOS or PMOS would be even easier. No dissing NMOS - some great chips where NMOS-only - all the micro revolution CPUs started that way - Intel, Zilog, etc etc.
Today's PCB solder paste stencils are usable as shadow masks for experimenting with large "homebrew" process features, so at least that's one thing you can get affordably. No matter which way you go, you'll probably want to start with something practical and well documented for "homebrew" conditions.
Probably the way Jeri Ellsworth did it would be the simplest way to go.
If you want actual chips, then just follow what Sam Zeloof did - it's a tested homebrew process, very well explained. I have little faith in replicating academic paper results, obtained in well equipped university labs, where all their mis-steps are not written nor mentioned publicly. For all we know, they may have had the hardest time getting this to work. Only the final result is what's published.