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I'm considering different PFC topologies for the AC-DC stage of a device around 1 kW with aim of optimizing for efficiency and secondarily component size. This far I have identified following options:

• Boost PFC

• Interleaved boost PFC

• Bridgeless totem-pole PFC (BTP PFC)

My basic understanding is that traditional boost topologies optimally can achieve around or below 98 % efficiency while Bridgeless totem-pole PFC with SiC or GaN MOSFETS transistors can be close to 99 %. Meanwhile, following MPS presentation claims that efficiency could be quite similar for a 300 W implementation, and the inductor size is actually larger for the BTP PFC.

https://www.monolithicpower.com/en/support/videos/high-power-pfc-totem-pole-pfc-vs-interleaved-boost-pfc.html

In terms of interleaved boost PFC vs standard boost PFC it appears as it’s mostly a preference of having two smaller or one larger inductor.

I’m looking for additional input and advice on the matter, either from your own experience or reference material. For the purpose of this question, the complexity of the control loop can be ignored.

winny
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    The classical boost PFC is truly the simplest possible implementation for a 1-kW project with two paralleled MOSFETs and a SiC diode. There are plenty of robust controllers to select. Interleave will require two smaller inductors but the stress on the various components will be lower compared to the classical boost. A TPPFC will certainly offer the highest possible efficiency but requires care in the control of the switches with input polarity detection and soft-start near zero-crossing for limiting spikes. – Verbal Kint Mar 08 '23 at 20:52
  • The SiC Schottky diodes seem to have quite high forward drop, it is really a good choice for a classical boost? – NoobPointerException Mar 09 '23 at 08:59

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I have looked at the various stress on the components for a 1-kW output power when supplied by a 100-V rms input voltage. Each PFC delivers 380 V dc. The below picture shows a CCM boost operated in fixed frequency without input voltage sensing:

enter image description here

The stress on the components is given above the schematic and shows a peak inductor current of 18 A with a fairly high rms current in the output capacitor. As stated in the comment, the classical boost converter is the simplest implementation and I've seen many circuits driving two paralleled MOSFETs and a SiC diode for a 1-kW power. Fairly straightforward operation. There are plenty of controllers for this application. A good overview on PFC operation is given here.

If we now go for a totem-pole PFC, as the one illustrated below, you can choose the same predictive control technique without input voltage sensing but the control of the power switches becomes seriously more complicated. You can have a look at the seminar I recently released on PFCs. This is because each high-frequency switch changes role depending on the input line polarity. So input line sensing for this management is important and, in particular, the transitions near the 0-V region with soft-start for these switches (see this paper from TI):

enter image description here

As expected, the overall stress is similar to that of the classical boost. I have adopted here a slow leg made of diodes but synchronous rectification is obviously a must if you want the best efficiency. Many comments coming from power designers point the nightmare to pass EMI tests with this TPPFC structure (see here).

Finally, you can consider the interleaved version which requires two inductors but you will reduce the stress on the semiconductors and particularly on the output capacitor:

enter image description here

I have kept the same inductors for the sake of comparison but you can certainly reduce their value. The peak and rms currents for these passive elements is much smaller compared to the previous embodiment. The rms current on the output capacitor is linked to a reduced high-frequency ripple current (the low-frequency contributor remains the same) and it is significantly smaller than with the two other approaches.

As a preliminary conclusion, the simple boost circuit looks like the simplest option to choose with its good efficiency and the numerous controllers to choose from. For the best efficiency, the TPPFC is a possibility but there aren't many PWM controllers so far (TI and onsemi to name a few) and implementation can be challenge. The Barbi bridgeless PFC can be a viable alternative. Finally, the interleaved PFC brings the lowest stress on the semis and magnetics but may require a larger PCB area compared to the other circuits. Please note that the SIMPLIS models are parts of the free ready-made templates you can download from my page.

Verbal Kint
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  • I'm thankful for this valuable information. I have same question for you: what is the benefit of SiC Schottky diode? It seems to have similiar Vf to other devices and there are Schottkys with zero recovery time. – NoobPointerException Mar 09 '23 at 09:40
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    With pleasure for the answer. The forward drop of the diode is not that important with a 400-V output. See this [doc](https://www.vishay.com/docs/86537/howtouseansicdiodeinapfccircuit.pdf) about SiC diodes in PFCs. These diodes are now mature and reliable, they are very often designed in modern converters. – Verbal Kint Mar 09 '23 at 19:12