Performance of a back-to-back NMOS for analog switching

Question

I wanted to make an analog switch in a pinch, so I cobbled together a quick back-to-back N-Channel MOSFET analog switch using junk box parts. It actually seems to work quite well.

^{simulate this circuit – Schematic created using CircuitLab}

I also tried this with PMOS and achieved similar results.

From my plot, I noticed the rise delay on switching off. Curiously, this was made more noticable by the introduction of C3 and C4 (needed to make the signal quiet when the FET is off). I wonder if this is a characteristic of low performance in my circuit.

From another answer (on audio switching), I see that the DG408 analog multiplexer or MAX4066 analog switch can be used for analog switching, but in a pinch, does my back-to-back NMOS configuration work just as well? Would it be appropriate for a production design? I appreciate that an IC would reduce the part count, so my question is academic. From reading the datasheets of the switch and multiplexer I mentioned, the internal workings for both are illustrated using a toggle switch, but I imagine they'd need to use some kind of FET.

Side note: I suppose using a JFET might eliminate the back-to-back MOSFET need, as it doesn't have the body diode, but I don't have any handy. That said, I read that while the JFET doesn't have a body diode, it is useless for everything but some niche signal stuff.

Edit: As suggested in the answers, I tried reducing Rload to 100 Ω, and this does indeed affect the lingering output voltage.

^{simulate this circuit}

Further changes indicate that actually, a 100 nF cap (C5) to ground performs well enough compared to C3 and C4 previously. I can't seem to simulate this noise problem in CircuitLab/SPICE, but in the physical circuit, here's the waveform...

Without C5:

40 mV is just about audible through speakers, and is unmistakably the same sound at 1/10 of the volume.

With C5:

10 mV is the same as the background noise.

Answer 1

A few words on the JFET (ex. N-JFET). It works indeed as a bipolar switch. If you pull the gate low, it turns off. The advantage is that it has rather modest off-capacitance, which is good.

However, its on-properties are a little bit more difficult:

• channel resistance is usually between 10..100 Ω depending on the part, which is on the high side. So it's fine for audio signals, but not for speaker drive.
• you can't pull the gate high as with a MOSFET, or you will pull the channel high, too. Instead you have to pull the gate to the channel.
• Therefore you need at least another switch, and cannot implement it using just a bistable logic output to drive the gate. That removes one of the main advantages. In the simplest case you can use a diode. When you pull the gate low, the diode conducts, when the control signal goes high, the resistor pulls the gate to the channel.
• The second resistor to the most positive supply makes sure that the gate is more negative than the channel at both ends, to allow reliable turn-off

^{simulate this circuit – Schematic created using CircuitLab}

Note that this switch will turn-on when the signal voltage becomes so negative that it is close to the negative rail. So while it can block most of the voltage range, it is not fully rail-to-rail. In this regard, it has a similarity with the 4-terminal NMOS analog switch, which cannot pass rail-to-rail voltages when on.

The upshot is that JFET are available with very small turn-off voltages such as 0.5 V and less. That means that you lose only a small voltage range and that allows this solution to be somewhat useful for 3.3V and 5V systems. If you have an analog voltage range that is much larger than the digital voltage range of the control signal, you can use another small-signal transistor instead of the diode, to pull the gate down in an open-drain/collector fashion.

^{simulate this circuit}

Answer 2

From my plot, I noticed the rise delay on switching off.

This is caused by the capacitive load suddenly being disconnected from the source, and having to rely, thereafter, on Rload to charge/discharge those caps.

Your source V1 has 0Ω impedance, and is able to provide all the current necessary (MOSFET drain-source resistance notwithstanding) to instantly charge the load capacitance to its own voltage at any instant in time.

In reality that would not happen, since the source will have some impedance, but in your simulation, the only reason you see the output following the input with such fidelity is this extremely strong source.

If the source happens to be at exactly zero volts at the instant when the MOSFETs switch off, then the capacitors at the output will be in a charge state where the output is also zero. However, if at that instant the source and output are non-zero, then the only path remaining for current to eventually bring the output to ground, is Rload, and you see a classic RC discharge curve at the output.

If you reduce Rload to, say, 100Ω I suspect you would see that "lingering" output voltage all but disappear.

I think it's likely your DIY switch will work just as well as an integrated circuit, for many applications, but may suffer under certain conditions merely due to the size of the circuit and routing of signals. For example, with an IC, you can probably expect shorter delays between the digital control input transition and the switch actually opening and closing, merely due to the physically smaller size, but I doubt this is of much consequence in typical, low frequency applications.

That said, if you are careless with your own layout and signal routing, you could easily produce a switch with appalling characteristics, which is not an indictment of the DIY approach, just a result of carelessness.