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I am designing an application where existing PoE infrastructure should be used to power a device instead of supplying each device with its own power supply. In this application, no data needs to be transferred over the Ethernet connection, in fact the Powered Device is not Ethernet-capable.

In order to reduce BOM costs (PoE Magjacks cost significantly more than standard RJ45 jacks) and the required PCB area (magnetics are usually rather large, and if they aren't, they are expensive again) my idea is to use resistors to create a virtual center tap without transformer-coupling.

This is how it might look like: A MagJack with 05R Resistors creating a virtual center tap

Since I am using an isolated flyback topology as a DC-DC converter and since the data lines aren't connected to my device, this method would still leave my device galvanically isolated. Also, the PoE standard allows for 20 Ohms of cabling resistance, and this method introduces only 0.5 Ohms, so it should also allow for correct detection of the PoE device and class and allow for a sufficient power level.

I checked DC-Resistance of PoE Magnetics and they usually were in the 0.5 to 1.5 Ohms max resistance range for the 1-2 or 3-6 pairs, so this should be DC-equivalent to using a transformer center tap.

Is this approach a bad idea, and if it is, why is it a bad idea?

Edit: My reasoning behind the resistors was to limit intra-pair short-circuit current. However, by looking at it again they are not reasonable for this purpose, as they won't adequately limit the high-frequency data current. Since I want a near-short on DC and a near-open on high frequencies, a choke would be the correct choice. But I guess I won't need these too, as Ethernet is already very resilient to shorts since the current is limited by the output transformer. So the resistors are probably not needed. (Thanks @Justme)

I would like to extend the original question to two additional questions:

  1. Is it a problem if there is a short on all data pairs, i.e. are the PSEs that notice and maybe cut off power to the PD?
  2. Are there other disadvantages of getting rid of the transformer, such as less decoupling and therefore higher EMI emissions or susceptibility on my ethernet line originating from my or to my PD converter?
joelsa
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    *isolated flyback topology as a DC-DC converter* ...are you considering adding a common-mode choke filter between this PoE interface and your DC/DC converter? Eliminating **all** magnetics might be a shortcut you'll regret. – glen_geek Mar 03 '23 at 17:49
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    If you don't even use Ethernet, you don't need magnetics and you don't need the resistors either. – Justme Mar 03 '23 at 17:51
  • @glen_geek A common-mode choke in order to limit common-mode voltage transients on the input side? – joelsa Mar 03 '23 at 18:54

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If you are making a 10/100M PoE device, you only have magnetics for the two data pairs where center taps are used for power, and you don't have magnetics for the two non-data pairs and they are simply connected together for power.

So based on that, any resistors would just be useless.

Justme
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  • My reasoning behind the resistors was to limit intra-pair short-circuit current. However, by looking at it again they are not reasonable for this purpose, as they won't adequately limit the current. Since I want a near-short on DC and a near-open on high frequencies, a choke would be the correct choice. But I guess I won't need these too, as the output transformers are probably already doing a better job at short-circuit protection than my chokes could. – joelsa Mar 03 '23 at 18:52
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    Yeah, but isn't it exactly same, if you had gigabit PoE PSE but 100M PoE PD? Or short circuit within the pair, which an Ethernet should handle without damage? – Justme Mar 03 '23 at 18:55
  • You are right, thanks, Ethernet is already very resilient to shorts. Another consideration might be if there are some PSEs that will detect a short-circuit on a pair and then cut off power to the PD. In the general case I don't think so, as most PSEs will only be connected to the center taps and therefore have no way of detecting a shorted pair. – joelsa Mar 03 '23 at 18:59
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    Well, does any PoE standard require or even allow testing for short on a pair? If not, then why would any PSE do that? And shorting the data lines does not cause any EMI requirements to be skipped. 100M designs have CM chokes for power, regardless of the pair being used directly or via center tap. – Justme Mar 03 '23 at 19:47
  • Yes, for example the IEEE802.3bt-2018 standard states, that: "A PSE may remove power from the PI [Power Interface] if the current on any pair exceeds the “PSE lowerbound template” [...]" in "145.2.10.9 Short circuit current". That obviously relates to the current going into the pairs center tap, so its clearly not relevant here. Table 145-16 specifies furthermore that this is the "Output current per pairset at short-circuit condition" (so a set of two pairs), even though that is wrong in my opinion, as it might be a short to shield or similar, so may not be a current through the whole pairset. – joelsa Mar 03 '23 at 20:51
  • I mean short on a pair as in intra-pair short, not inter-pair short. Again, will any PoE PSE detect a short between TX+ and TX- of the TX pair? If not, TX+ and TX- can be shorted together without any transformer. The pair would be shorted and would not show correct 100 ohm impedance for sure, but I don't think PSE is interested about that, as long as the PoE currents are within limits and they should be even if there is no center tapped transformer. – Justme Mar 03 '23 at 22:53