I am working on modelling a THz detector in Verilog A. Graphene FET can be used as a THz detector which generates DC voltage proportional to the intensity of the input THz signal as given by the equation shown below (research paper). Here, the input is THz signal with amplitude Ua and a DC offset of Uo, and the output is the delta U.
My question is:
To model the output equation, we need to extract the DC voltage and the amplitude of the input signal. How can this be done in verilog A?
