I'm currently working on understanding DDR4's behavior. I'm referring to the following figure:
As far as I know, x4 architecture will have 4 memory arrays, x8 will have 8, and so on (so the figure will describe an x8 system).
Then, in the figure, if the bank address, row address, and column address are given for a READ command, will DDR4 give 8 bits as returned data?
Also, how will DDR4 give bits for burst support?
