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I'm connecting two MACs back to back.

One is the IMX6 processor. The other device is this Microchip LAN9370 "5-Port AVB/TSN Gigabit Ethernet Switch with Integrated 100BASE-T1 PHYs".

In that case, should I connect TX to RX of the devices or should it be TX to TX? The MII interface between the 2 MACs is RGMII (100Mbps). Also, TXC to RXC is what I've connected.

Is this TX-RX connection, correct? Or should it be TX-TX because I am connecting the MACs in Back to back fashion?

Chris Knudsen
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  • Thank you @jonathanjo for your comment. But I checked that question before. That did not help to clarify my query. Could you please help. –  Dec 16 '22 at 14:08
  • You connect RX to TX just like the diagrams in that question. I also recommend you read [TI's application note](https://www.ti.com/lit/an/slla327/slla327.pdf). – jonathanjo Dec 16 '22 at 14:14
  • @jonathanjo, thank you. But one thing I want to clarify is that, I am not talking about the copper section (TX and RX). I am talking about the digital interface section. The RGMII section between the MACs. The Tx datalines of the RGMII (of the IMX6 processor) is connected to the Rx datalines of the RGMII (of the LAN9370)? Is it correct? –  Dec 16 '22 at 14:16
  • I'm not familiar with those parts nor their signal details. But the TX pins are outputs and the RX pins are inputs, and so, that is the way round the information must flow. – jonathanjo Dec 16 '22 at 14:18
  • So, is it true for the RGMII interface section of the MAC devices as well –  Dec 16 '22 at 14:21
  • Also, the datasheet of the LAN9370, pin description table for the Tx pins say that the tx pins are outputs and the Rx pins are inputs. Hence, it will be the same for the IMX device right? In IMX also, Tx would be output and Rx pins would be input, right? If thats the case, the Tx should be connected to Rx, right? @jonathanjo –  Dec 16 '22 at 14:24
  • For media independent interface to media independent interface connections it’s my understanding that one of the devices must “emulate a phy” - two MACs don’t directly connect normally. The good news is that some of the switch chips I’ve researched specifically support this connection as it’s common for building things like wireless routers – Bryan Dec 16 '22 at 17:01
  • @Bryan, so the datasheet of the LAN9370, pin description table for the Tx pins say that the tx pins are outputs and the Rx pins are inputs. Hence, it will be the same for the IMX device right? In IMX also, Tx would be output and Rx pins would be input, right? If thats the case, the Tx should be connected to Rx, right? –  Dec 16 '22 at 17:09

1 Answers1

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TX to RX. In the image below there is a phy to phy connection.

enter image description here Source: https://forum.wiznet.io/t/topic/341

Voltage Spike
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  • Could you please help with the RGMII interface? –  Dec 16 '22 at 16:46
  • What do you need help with? – Voltage Spike Dec 16 '22 at 16:48
  • the datasheet of the LAN9370, pin description table for the Tx pins say that the tx pins are outputs and the Rx pins are inputs. Hence, it will be the same for the IMX device right? In IMX also, Tx would be output and Rx pins would be input, right? If thats the case, the Tx should be connected to Rx, right? –  Dec 16 '22 at 17:08
  • Are you talking about the ethernet ports or the RMII interface? The RMII interface is straight across RX RX, TX TX (but double check on the eval board and datasheet in case someone decided to go out on a limb and change convention). – Voltage Spike Dec 16 '22 at 17:29
  • I am talking about the RGMII interface. Should I connect TX to TX between RGMII interfaces? or TX RX? –  Dec 16 '22 at 17:30
  • Yes, TX TX on RGMII – Voltage Spike Dec 16 '22 at 17:33
  • Let us [continue this discussion in chat](https://chat.stackexchange.com/rooms/141355/discussion-between-newbie-and-voltage-spike). –  Dec 16 '22 at 17:36