The diodes seem to be reverse biased, which doesn't make sense.
This is from the Olimex Ethernet EVB.
The diodes seem to be reverse biased, which doesn't make sense.
This is from the Olimex Ethernet EVB.
Why are the diodes used in this fashion for the RX and TX lines? They seem to be reverse biased
This means that the TXD port can pull the GPIO/U0RXD line down to a zero logic level (via D3) or, if the TXD port is set high, the GPIO/U0RXD line is pulled high by the associated pull-up resistor.
It could be done this way to prevent multiple devices trying to drive different logic levels to a common/shared line. There could be other reasons of course.
In addition to what Andy aka said it also protects, for example, 3v3 logic from 5v logic due to additional pullup.