2

I am trying to test ReLU, but it always gives 'x' for the output.

//Relu.sv////
module ReLU # (parameter Width=8)
    ( input signed [2*Width -1:0] dataInput,
      output reg signed [2*Width -1:0] dataOutput
     );
    always @*
    begin 
        dataOutput = (dataInput[(2*Width)-1]==0)? dataInput : {2*Width-1{1'b0}};
        
    end
endmodule

//////Relu_TB.sv/////////////////

`timescale 1ns/1ns
module ReLU_TB # (parameter Width=8);

     reg signed [2*Width -1:0] dataInput;
     wire signed [2*Width -1:0] dataOutput;
     reg signed [2*Width -1:0]dataOutput1;
     
      //UUT
     ReLU ReluTest 
     (
     .dataInput(dataInput),
     .dataOutput(dataOutput)
     );
     initial
     begin
        $display("Start of Initial\n");
        
        #50
        dataInput=127;
        $display("input val= %d\n", dataInput);
        if(dataInput[(2*Width)-1]==0) begin
        dataOutput1=dataInput;
        end
        else
        begin
        dataOutput1=0;
        end
         
        $display("out val= %d   %d\n",dataOutput,dataOutput1);
    end
endmodule

///////////////////////////////

//Results
# Start of Initial
# 
# input val=    127
# 
# out val=      x      127
# 
toolic
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1 Answers1

2

You have a simulation race condition. You are trying to display a signal value at the same time it is changing. One way to fix it is to add delay before you display. For example, change:

    $display("out val= %d   %d\n",dataOutput,dataOutput1);

to:

    #1 $display("out val= %d   %d\n",dataOutput,dataOutput1);

This shows:

Start of Initial

input val=    127

out val=    127      127

Another way is to change $display to $strobe.

toolic
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