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We are designing a custom board for AD9082 and serdes of which are mapped to QSFP-28 port.This board will communicate with FPGA board using QSFP-28 module. AD9082 and FPGA will linkup using JESD204C protocol.

I am planning to use TQS-QG4H9-J83 optical module for our use case. Now the problem is the datasheet of TQS-QG4H9-J83 mention the data rate as 25.7815 Gbps but AD9082 max data rate is 24.75 Gbps.

So, my question is can we operate TQS-QG4H9-J83 at 24.75 Gbps data rate? Does QSFP-28 module will work only at 25.7815 Gbps because of CDR limitations?

I have asked the question to the vendor also, but did not get any reply yet.

It will be helpful if anyone here has face the same challenge and know if QSFP-28 module in general can work at 24.75 Gbps data rate.

Edit:

Adding the block diagram of the setup. Both AD9082 and FPGA supports 24.75 Gbps per lane data rate. enter image description here

Lalit
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  • Highly related question; but it's about SFP+, not QSFP-28, so there might actually be differences: [Under-clocking an 10gb Ethernet SFP+ module](https://electronics.stackexchange.com/q/500945/64158) – Marcus Müller Nov 30 '22 at 09:16
  • @MarcusMüller, added the setup block diagram. Both AD9082 and FPGA will run at 24.75 Gbps data rate. Do you think QSFP-28 AOC cable will support 24.75 Gbps data rate with our setup? – Lalit Nov 30 '22 at 09:51
  • I honestly don't know. As noted here as there, depends on whether your optical modules contain CDR. – Marcus Müller Nov 30 '22 at 10:00
  • @MarcusMüller, module contain the CDR. – Lalit Nov 30 '22 at 10:01
  • In that case, that CDR will adhere to the properties as listed in "Electrical characteristics", and hence will likely not work at a rate lower than 100 ppm below the nominal rate. – Marcus Müller Nov 30 '22 at 10:03
  • Found similar question :https://electronics.stackexchange.com/questions/505695/using-qsfp28-module-at-lower-lane-rate – Lalit Dec 01 '22 at 11:46

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