Pragma exist to tell the synthesis tool to ignore lines or blocks of code, using this:
-- synthesis translate_off
... code to ignore
-- synthesis translate on
But are there pragma that can be used to tell the simulator to ignore certain lines or blocks of code as they are intended for synthesis only and not be considered by the simulator tool?
EDIT:
OK here is an example just to make a point, a counter in synthesis counts upto 100,000. In simulation I need the simulation to run faster so in simulation the counter shall only run upto 100.