System level improvements for a product in a plastic enclosure without exposed connectors to pass IEC 61000-4-2. Discharges through slit zapped LEDs

Question

Our product failed ESD during precompliance.

Specifically, 4 LEDs got zapped, six times each (3 positive and 3 negative charges), during an 8kV air-discharge test, causing permanent damage to the LEDs only, some are on for brief random moments but then off again. They were positioned behind the 0.6mm glass part of the enclosure and near its border with the product's plastic part of the enclosure. The discharge travelled through the border's slit and moved up 3mm along the glass to reach the LED.

Could you please comment on the validity of the system level improvement suggestions below for protecting against ESD next time?

a. Removing the LEDs completely since they are the cause of the discharge. (I'd rather avoid this solution)

b. Position the LEDs as much towards the center of the glass as possible and far away from its border with the plastic enclosure where the slit is. There's not much space left but hopefully even a 0.5mm delta could prevent a discharge from occuring?

c. Expose the copper on the PCB around the holes where the screws have contact to hold the PCB in place against the plastic enclosure. Assign this copper area as "chassis ground" and connect to a single point through a ferrite bead to the PCB ground. The idea is to divert current towards the chassis ground whenever the tip of the ESD gun touches the outside of the plastic enclosure near the slits where the discharge happened last time. Currently the plastic enclosure is connected to nothing. According to this, solution c should work better with a metal enclosure or by using conductive plastics.

d. Remove a tiny bit of soldermask from the ground copper pour on the front layer of the PCB, near the LEDs where the discarge occurs, connect a resistor to that ground point and leave the other pad of the resistor exposed to act as a "lighting rod", as suggested in this second answer. I'd rather avoid this if you think b and c would work because I fear exposing the copper might attract the discharge more easily than when the ground pour is masked.

e. insert some form of ESD-proof, airtight sealant in- between the glass and the plastic, basically wherever there is currently a slit.

Any other suggestions? Thank you

EDIT

Thanks everyone for the elaborate answers. I have upvoted all but will accept Tim's as the answer, (I consider tobalt's answer a +1) because most of the changes I'll make will revolve around extending the ground plane as a first line of defense, by moving LEDs further from the edges, expanding the board and ground plane and reducing the clearance to the LEDs. Unfortuantely there's not much time for further prototyping otherwise feynaman's would have been an amazing fix, if only we knew about this earlier. Failed to consider ESD from the beginning... Lastly, I find part of Tim's answer to contradict jpa's answer, specifically point c. Tim suggests it may make things worse, whereas jpa suggests to make the change since we're redesigning anyway. Some confirmation about this would go a long way: Should I tie screws to gnd? To chassis gnd (which will be tied to ground)? Or leave as is?

Will provde update after re-testing.

Answer 1

Would light pipes/tubes be an option in order to be able to position the LEDs farther away from the "danger zone"?

Answer 2

More aggressive mitigations are not listed, I assume because of cost-adder reasons. I will list a few here for completeness:

1. Metal shield around board. Acts as a primary ground plane, allowing ESD currents to wash around the PCB within. Gotcha: can't cover the front, because glass.
2. Screened glass. ITO and fine mesh coverings are available, which can shunt ESD around the board, extending the shield of (1) to include the front. (This is probably quite expensive, outside of certain readily available items, or in mass production.)
3. Improved insulation. Something of a non-answer, as it doesn't deal with partial discharge, or occasionally, poor adhesive bond / fitment. But this is a common strategy. Typically the insulation is a polyester or vinyl coverlay, adhesive-bonded to the enclosure, which can additionally be printed with legend material, as well as having clear areas for viewing. Perhaps your glass component (assuming it's literally just a window) could be replaced in this way, but there is a prototyping cost associated with these, again making them most economical in production (but at least at rather modest quantities i.e. 100s).

Anyway, (d) is probably best. Discharge is almost inevitable -- if not by direct strike, then from nearby partial discharge* -- and the best plan is to shunt that around the circuit. When a strike hits the periphery of the ground plane, the entire board becomes charged in an expanding wave; the electric field of this wave, as it propagates along the surface, can couple into signal traces, but is still much lower amplitude than if those traces were exposed to a nearby discharge, let alone direct strike.

A ground plane provides shielding value, even if there's line-of-sight to the facing area of the board. No, it's not nearly as much value as for an enclosed shield, but it's something, and obviously it's much better than a wide open mesh of traces without plane at all.

The difference between "line of sight" (implied: at optical frequencies) and what's going on during an ESD pulse is, the latter has a more modest wavelength: for ESD, things look "optical" at length scales of some m; that is, the rise time is some ns, so the wavefront is say 10s of cm, and geometric optics would only apply for much longer length scales. At the scale of a small PCB (say ≤ 10cm) it's quasi-static electric fields, very blobby stuff. Near fields obey much simpler rules, and the ground plane having more area (a greater cross-section of the face, say) than the traces on top of it, is where the shielding value arises.

In contrast, (c) is a poor option, because it doesn't do very much at all, or could even make things worse. Having a long path around the board means, when struck, it acts as a very much closer coupling plane, and the massive current rate (remember, ESD is some amperes in some nanoseconds, it's very intense in electronic terms) means induction into anything nearby. Such fields should still be mostly blocked by ground plane, but traces near the edge of the layout area could see much higher fields than otherwise. And, terminating that path into another series impedance (ferrite bead) just makes things worse -- mind, not as bad as it sounds at first, because a ferrite bead will saturate instantaneously at these levels (a typical 300Ω 0805 chip bead saturates at around 100mA of DC bias). It's more that it's another bit of wiring length between the "ground" structure and the plane.

So, better to cut out the middleman and discharge to the plane in the first place. Keep some distance between components/traces and the edge of the board, and extend plane to the edge. And yes, filling top/bottom layers around the edge (stitched with vias every 20mm or so, say) helps a bit, if nothing else by presenting a target.

Better, that is, if discharge can't be avoided entirely, which would of course be the most preferable.

*You know that staticy sound, a quiet crackling, when plastics or other insulators become charged? That's charges zipping around suddenly across the surface. Each spark, while minuscule (you might not even be able to see the spark in a darkened room), is another very small ESD event, this time much closer to the board -- and with the short length dimension, it can have faster risetime as well. This often shows up as an incidental part of an ESD test (when dragging the tip across the surface looking for air discharges), so it's not exactly missed as part of normal testing, but it's not a waveform that's explicitly part of the test.

On the upside, I don't think PD usually has enough strength to be a problem, if normal (impulsive) ESD is also passing (the lower level is another consequence of the small size of these discharges; it might be 10s or 100s of V as seen by the board itself).

Note that static-dissipative materials are resistant to partial discharge, since the material's very slight conductivity provides a ready path for the charge equalization, without sparking movement (while having little or no impact on direct discharges or impulses).

Answer 3

If ESD to a floating device causes it to show functional upset, then this is either due to:

• overcurrent through a specific exposed component, including latch-up destruction
• fake digital signal reading due to transient differential potential on some signal lines.

Both of this is avoided if you dump the ESD charge directly into a solid copper plane.

This will spread the charge around the board with minimum impedance, handle the current without issue, and minimize any differential mode voltages to low levels where they don't cause any upset.

So, expose the edge of the board. Place many vias to an internal plane, to keep impedance low.

Answer 4

Soldermask does not have much effect on ESD discharge path, so c) and d) are probably not effective by themselves. It can give some improvement though, so if you are going to remake the PCB, why not add that also.

Your question did not specify the actual effects of the discharge. Easiest solution could be to add ESD protection diodes on the PCB, in parallel with each LED. That will protect both the LED itself, and the IO pin that is controlling the LED.