A lot of background, the question is at the end:
I have made some simulations and experimental tests with the goal of achieving lowest possible noise floor using DACs with a sample rate of at least 200 kHz (BW ~ 100 kHz). Specifically I want to obtain less than 10 nV/√Hz per Volt of output range. I considered the following major contributions to white noise:
- the thermal noise of the DAC resistor network and amplifications stages. What I found out in the simulations, was that thermal noise can be well controlled with suitable parts to be well under 5 nV/√Hz per Volt of output range.
- the wideband timing jitter which transforms into wideband voltage noise when noise shaping is used. At sample rates of a couple of 100 kHz, even mediocre figures such as several dozen ps timing jitter wasn't a meaningful contribution, well below 1 nV/√Hz per Volt of output range
- the effects of glitches such as major carry glitch and digital feedthrough glitches. Data is hard to come by, so I used some guesses. The simulations revealed, that even "good" DACs with low glitch values such as 1 nV*sec generate an absolutely atrocious noise floor due to this contribution when switching at a few 100 kHz. I'm talking about "~100 nV/√Hz per Volt of output range"-atrocious.
So I thought, DAC makers aren't stupid. The quoted glitch values are probably rare exceptions for rare specific transitions, and the mean glitch is much much weaker. So I got hold of a MAX5717, which is advertised as an ultra-low-glitch DAC. The resulting noise when running at 500 kHz sample rate was still about 15 nV/√Hz per Volt of output range, far exceeding its thermal noise and jitter-induced noise.
So at this point, I am slowly giving up on R-2R DACs for this quest. If even the best-in-class (glitch-wise) DACs have their noise so horribly ruined when running at a few 100 kHz, I believe the only way to go forward is a discrete-built single-bit Delta-Sigma DAC, because as far as I understand, these should be inherently glitch-free. The jitter contribution will be much more meaningful for them, so it will be challenging but I don't rule it out.
My question is if there is some kind of general strategy to obtain the white noise figures for a signal bandwidth of ~100 kHz using multibit R-2R DACs. And if not, what DAC topology will be the most realistic to reach this goal and why.
