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Here is a picture from the datasheet of the LM386.

Obviously, the input signal is swinging above and below the ground, but pin 4 is not connected to a negative supply. It is connected to the ground (while pin 6 is the positive supply.) How can this amplifier follow signals below ground? I don't think this IC has an internal positive to negative DC converter.

LM386-AM

JRE
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MikeTeX
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2 Answers2

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Read the datasheet of the LM386: "The inputs are ground referenced while the output automatically biases to one-half the supply voltage."

The chip adds an offset voltage internally.

Internal circuitry of the LM386

The way this is done in the chip is rather clever: On the left, the inverting input's PNP emitter follower is biased with two 15k resistors in series from the supply voltage (30k in total, with a bypass terminal in the middle to improve PSRR). The non-inverting input's PNP emitter follower, however, is biased with a 15k resistor from the output. The PNP followers form a differential amplifier and an NPN current mirror below them forces equal currents through both PNP followers. This means that the currents through the 30k and 15k resistors are equal, which in turn makes the voltage across the 15k resistor half of that across the 30k one. Therefore, the output is roughly at half of the supply voltage when the amplifier is quiescent.

The gain resistors between the PNP followers (150 Ohms, 1.35k Ohms) have zero current flowing through them when the amplifier is quiescent. When an AC input signal is applied, though, they skew the current balance between the two PNP followers. This causes the output to swing around the half-supply-voltage midpoint, which in turn varies the current through the rightmost 15k resistor to compensate the current imbalance, thereby achieving linear amplification. (The current through the gain resistors is proportional to the input voltage, and the current variation in the 15k resistor is exactly equal to the gain resistor current. Therefore, the output voltage varies linearly with varying input voltage.)

At no point are any negative voltages involved within the chip's internal circuitry.

This still works for negative input voltages since transistors can still operate when their collector-emitter voltage is lower than their base-emitter voltage, up to a point (the transistor's collector-emitter saturation voltage). With -0.1V at the input of the amplifier, for example, the PNP emitter follower has to output about 0.4V at its emitter (assuming 500mV base-emitter voltage drop). Its collector is at 0V, leaving 0.4V collector-emitter voltage for the transistor to operate. This is sufficient and the emitter follower can follow the input voltage just fine. Typical saturation voltages (minimum collector-emitter voltage for the transistor to operate without saturating) are between 10mV and 100mV. In this case, this means that the PNP follower's emitter can go down to at least 100mV before it stops working (and the input therefore down to -400mV), which matches the datasheet value. The rest of the circuitry won't actually see any negative voltages.

The same principle is used in rail-to-rail opamps in order to make them accept input voltages slightly beyond the positive and negative supply rails. (Just usually with FETs instead of BJTs.)

The chip's overall function is essentially this: Vout = 1/2 * Vcc + (V+ - V-) * gain

Jonathan S.
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  • Question to be sure I understand: If input pin 2 is left unconnected, is it biased at some potential between ground and Vcc? – MikeTeX Oct 31 '22 at 15:06
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    @MikeTeX No, you can't leave any of the two inputs unconnected. The internal biasing means that when both inputs are *grounded*, you get roughly half the supply voltage at the *output* of the chip. Varying the input voltage then varies the output voltage around that midpoint. I've edited my answer to include a formula explaining the chip's function, maybe that makes it clearer. – Jonathan S. Oct 31 '22 at 15:07
  • @Jonathan S. Then I still don't understand: Suppose a voltage of -1 V is applied to input pin 2 (while the positive input is grounded as mandatory). I understand that the output will be equal to half the supply voltage minus 1 V times gain. But I don't understand how -1 V can be followed by the IC, as the negative supply of the IC is just ground (hence above -1 V), and everything here is just transistors and resistors. – MikeTeX Oct 31 '22 at 15:16
  • @MikeTeX -1V is too negative, the chip won't be able to amplify this voltage. However, let's assume the inverting input is at -0.1V. There are two cascaded PNP emitter followers on the inverting input, which each add roughly 0.5V to the input signal, bringing it up to around 900mV internally in the chip. The same happens at the noninverting input, which means that the voltage difference will stay the same. – Jonathan S. Oct 31 '22 at 15:22
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    @MikeTeX The answer to that question is that an emitter follower only needs about 100mV from emitter to collector to work (the saturation voltage). – Jonathan S. Oct 31 '22 at 15:24
  • @Jonathan S. That's super interesting: I didn't know that a transistor follower could follow a voltage slightly above (or below for PNP's) their collector voltage. I suggest you elaborate a bit on this point in your answer, because this is actually the essential answer to my question. – MikeTeX Oct 31 '22 at 15:29
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    If the input swings to the maximum allowed voltage of -0.4V then the base-collector junction is not yet forward biased so the input works fine. – Audioguru Oct 31 '22 at 15:33
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The internal circuitry of the chip is biased so that 0V DC voltage on input becomes half supply DC voltage on output.

Then AC voltage swings of input that have 0V DC bias become amplified and have a larger AC voltage swing with gain at half supply DC voltage bias.

The chip inputs are biased (ideally) to 0V, and due to the internal input PNP transistor structure, it can handle posive and negative swings.

According to datasheet, the absolute maximum input range (which means it won't be damaged) is from -0.4V to +0.4V. In practice, that high levels of up to 0.8Vpp is not needed, because the minimum voltage gain is 20, so it would result into output swings of 16Vpp, which would require at least 18V supply voltage. Not all LM386 models can work with that high voltage, only e.g LM386N-4 from all TI models can, and in practice the chip output power limit to 8 ohms can already be hit by the standard 12V supply.

So in practice, at minimum gain of 20, and maximum output swing of 10Vpp at 12V supply, the input swing is only 0.5Vpp or +/- 0.25V maximum, and with added gain, even smaller voltage input is needed to fully use the chip.

Justme
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  • I understand the logic, but I don't understand how the IC do that, unless it has a positive to negative converter built in. – MikeTeX Oct 31 '22 at 14:56
  • @MikeTeX I don't understand what you mean by a "positive to negative converter" is but clearly the chip has no such thing built in as you have the chip schematics in the datasheet. It simply internally biases the voltages. – Justme Oct 31 '22 at 15:00
  • Actually, I thought the input pin 2 is not biased, since they say it is referenced to ground. So I didn't understand how can input voltage below ground be followed. – MikeTeX Oct 31 '22 at 15:09
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    The 50k resistor and/or volume control on the input causes the input to be at 0VDC and the output to be at half the supply voltage. Then an audio input signal of 0.4V max causes the input DC voltage and the output DC voltage to swing up and down. The similar darlington PNP inputs on an LM324 and LM358 opamps can also be biased at 0VDC ground and swing a little positive AND NEGATIVE. – Audioguru Oct 31 '22 at 15:27
  • Thx. The fact that they can swing "a little negative" just answer my question. I would be happy to know more about that though, as this is not a commonly known property of transistors. – MikeTeX Oct 31 '22 at 15:43
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    @MikeTeX - although it is negative with respect to ground as it is a PNP transistor this just means that the collector to emitter voltage is smaller than the base to emitter voltage. That is a common occurrence when a transistor is saturated. – Kevin White Oct 31 '22 at 17:00
  • @Kevin White. Yeah, but I unconsciously thought that the saturation mode was used only for switching currents, not for following or amplifying a signal. I think that's how most people think about that. – MikeTeX Nov 03 '22 at 19:09
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    @MikeTeX - the base of a PNP can go to about 300-400mV more negative than the collector voltage before the collector-base junction is forward biased - linear operation is still possible in that region – Kevin White Nov 04 '22 at 18:14