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I would like to preface this by saying that my project here is an educational exercise, and I hope that by sharing it and requesting feedback, some other fine folks will learn from it too.

I know that the correct solution here is "use a gate driver IC", but for the sake of argument let's assume we're in the middle of a chip shortage and discrete components are back in style.

I am making a solid-state relay using NMOS transistors. After much tinkering I can confirm the circuit below works as intended and is able to permit an AC waveform with low impedance, or block it entirely. The AC is between Vpos and Vneg.

Schematic Diagram of an AC switch using NMOS transistors

The op-amp at U1 allows me to send a 5 V or 3.3 V signal from a signal source that is not referenced to Vsource1 (like a microcontroller on a switching power supply) which can control the MOSFET. The lower MOSFET Q8's driver has been left as it was when I was simulating, for simplicity.

Now for the question: This works, but I think there is a better way that my inexperience is causing me to miss. All suggestions aside from the obvious "use a gate driver IC" are welcome!

Here's what I've considered:

  • I know I could use an optocoupler here, but for the sake of switching speed I chose not to use one.
  • A comparator is a better choice than an op-amp for what I've done, but I had the SPICE model for an op-amp handy.
  • A Zener diode between the gate and source of each MOSFET would be good to prevent potential Vgs overvoltage, but I have not observed this to be possible: Vboost1 = Vsource1 + 10

Other design notes:

  • The BJT totem poles could be replaced with MOSFET equivalents for lower power consumption, faster switching, etc. BJTs are cheaper at the moment, and also their spice models work better in Ngspice.
  • Pull-downs R2 and R3 are for safety: when the switch signal is MIA, the MOSFETs are off.
  • Vbe does not appear to be exceeded on any of the totem poles. I'm seeing a maximum Vbe of less than 1 V.

All suggestions about how to improve this design are also welcome.

Update: Curious readers may be interested in an improved schematic. Please note that the design below works in simulation, but is unsafe due to a lack of galvanic isolation between Vsource and the low voltage elements through the charge pump. Improved Schematic

PyroAVR
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  • You need to specify what AC means in terms of voltage and what it's referenced to. Do you mean AC as in Vsource1 or Vpos and Vneg? How do you satisfy Vgs? – Voltage Spike Oct 30 '22 at 05:42
  • @VoltageSpike fixed - it's between vpos and vneg. Vgs is solved by a charge pump, shown here as V2: a 10V source between vsource1 and vboost1. In the full schematic there is an actual charge pump which works fine, I just elided it here for simplicity. – PyroAVR Oct 30 '22 at 05:46
  • What is the voltage on vpos and vneg? It is not listed anywhere in your post – Voltage Spike Oct 30 '22 at 06:16
  • Why not use a single driving circuit for both gates? – Lars Hankeln Oct 30 '22 at 06:28
  • @LarsHankeln I will update the schematic to do this once I'm done with testing, I agree that's a good idea. – PyroAVR Oct 30 '22 at 23:26
  • @VoltageSpike I am designing the system for ~120VAC, but intend to choose my mosfets to have significantly higher breakdown potentials. The SI7450DP mosfets in this schematic can withstand 200VDC across the drain and source. I will likely switch them out for something with lower Rds,on though. – PyroAVR Oct 30 '22 at 23:29
  • So how do you plan on getting the gate voltage high enough to turn the FET on fully? – Voltage Spike Oct 30 '22 at 23:49
  • @VoltageSpike there is a charge pump connected between Vsource and Vboost. For the sake of this example, I have shown it as a voltage source labeled V2. The MOSFET gates are connected to either Vboost or Vsource with the totem pole circuit, which makes Vgs ~= 9V, or ~=0V. I can confirm this part of the schematic works as intended. – PyroAVR Oct 31 '22 at 02:13
  • Your circuit does not have any isolation from the mains voltage at vpos/vneg. It only works if GND is floating along with vsource1 and that makes the entire circuit mains connected. – Lars Hankeln Oct 31 '22 at 05:46
  • @LarsHankeln I would have a floating ground, yes. After looking at the schematic more in depth I can see how there is no galvanic isolation between the mains and the logic components. I now see that I need some kind of power supply so that the only input signal is for the switch, since even the charge pump is not isolated. – PyroAVR Nov 01 '22 at 05:07
  • In your new schematic, you need to connect the collector of Q4 to the common sources of the MOSFETs. And if Vboost1 is higher than the zener voltage of D9, Rgate should be high enough to not exceed its current rating. – PStechPaul Nov 02 '22 at 02:43

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Here is a simulation of a very simple isolated AC switch, using a 10 kHz signal through a small transformer, to two NMOS devices with common gates and common sources.

AC Switch

PStechPaul
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    It took me a little bit to understand how this works - the 10kHz signal is rectified on the high side to feed a boost circuit. I would never have thought to do that, thanks for the info! – PyroAVR Oct 31 '22 at 02:20
  • I used a sine wave for the simulation, but for a real implementation a square wave like from a 555 would be more practical. And a full wave bridge might be better. If this answers your question, please consider upvoting and accepting. Thanks! – PStechPaul Oct 31 '22 at 03:06
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    Accepting this answer because it is by far the simplest design I've seen yet. I don't think I will implement it this way since I am looking to build something "fully integrated" eventually (eg. current sense, OT, OC, UVLO), and my design will need a complete rework to support those features. Thanks for the insight! – PyroAVR Nov 02 '22 at 02:04
  • If you want to more than an on-off switch, you could use PWM. But then you might need to supply an isolated DC supply using a high frequency transformer, and an opto-isolator to modulate the gates. And if you want to be able to vary the output into an inductive load like a transformer, you will need a full bridge, or two back-to-back NMOS pairs. – PStechPaul Nov 02 '22 at 02:18