In broad strokes
Despite such a simple appearance, the following behavioral schematic has a lot to discuss:
simulate this circuit – Schematic created using CircuitLab
The first few things to notice are these:
- The speaker is single-ended from the amplifier, with the other end ground-referenced.
- The speaker is DC connected to the amplifier. There's no capacitor.
- The amplifier output to the speaker directly follows the input voltage source.
The 2-BJT amplifier stage is a follower. The output voltage will directly follow the input voltage. The blue-marked path shows why. \$Q_2\$'s emitter will be about a diode voltage above the signal and \$Q_1\$'s emitter will be about a diode voltage below that, so the output should not only follow the input but should do so with only a little bit of offset.
Before going further afield, note that the output will not be exactly the same voltage as provided at the input. There will be an offset; largely due to differences in manufacturing, differences in temperature, and differences due to the collector currents.
This is somewhat important. If the input signal were exactly \$0\:\text{V}\$, we'd expect that the speaker should also have \$0\:\text{V}\$ applied to it and therefore have no current. But this isn't what will happen. Instead, there will be a slight offset -- perhaps a few hundred millivolts -- and so some tens of milliamps in the speaker.
That may not be desired. But it is what will likely occur.
Also, as \$Q_1\$ heats up, it's base-emitter voltage will decline (at around \$-2\:\text{mV}\$ per \$^\circ\text{C}\$.) And that may cause more offset and more heating due to supplying still more current in both the speaker and \$R_1\$. This temperature-driven offset drift may not be countered by other negative feedbacks until something bad happens. So it's something to keep in mind. (And it may suggest inserting a small-valued emitter resistor to supply some negative feedback to that process.)
Preface to your question
The quiescent current must be at least as large as the maximum output
current during peaks of the waveform.
The quiescent current is approximately the one that runs through \$R_1\$ when the output voltage is \$0\:\text{V}\$. (Ideally, when the input voltage is similarly \$0\:\text{V}\$.) This will be \$I_{_\text{Q}}\approx \frac{0\:\text{V}-V_{_\text{EE}}}{R_1}\$, where \$V_{_\text{EE}}\lt 0\:\text{V}\$.
(Because of the sign of the quiescent current, which is positive, we could technically argue that it should strictly be computed as an NPN collector current. But as the emitter and collector currents are nearly the same magnitude, there's no point belaboring that issue. It's enough to know that this is, in round terms, the quiescent current of the amplifier and to choose to compute that magnitude based instead on the more easily expressed emitter current.)
The signal input moves through a full cycle, both positive and also negative. (This is a DC-connected amplifier stage.)
During the positive half, \$Q_1\$'s emitter will (ideally) also be positive and sourcing current into both \$R_1\$ and the speaker. So the quiescent current setting doesn't matter here. The quiescent current into \$R_1\$ when the output voltage is \$0\:\text{V}\$ could be anything so long as it results in some emitter current from \$Q_1\$.
But during the negative half, when \$Q_1\$'s emitter is also negative, it must still be sourcing current in order to stay active. And it must be sourcing current all the way through the entire negative half of a cycle, when the speaker is also sourcing current now! So, at the most negative point of the cycle, \$R_1\$ must be able to sink at least some emitter current from \$Q_1\$ while also sinking all of the speaker's current, too.
So, let's assume for a moment that some emitter current means \$I_{_{\text{C}_\text{MIN}}}\gt 0\:\text{A}\$. And at this same moment, \$R_1\$ must also sink all of the speaker current, \$I_{_\text{SPKR}}= \frac{0\:\text{V}-V_{_{\text{IN}_\text{MIN}}}}{8\:\Omega}\$. Clearly, this means that \$V_{_\text{EE}}\$ must be more negative than \$V_{_{\text{IN}_\text{MIN}}}\$ by enough of a margin that \$R_1\$ can sink all that current into the negative rail.
Find:
$$V_{_\text{EE}} \le V_{_{\text{IN}_\text{MIN}}}\cdot\left(1+\frac{R_1}{R_{_\text{SPKR}}}\right)-I_{_{\text{C}_\text{MIN}}}\cdot R_1$$
You can cut the margin down to zero, allowing \$Q_1\$ to slip out of active mode at the most negative moment of the input signal, and then simplify the above to find:
$$V_{_\text{EE}} \le V_{_{\text{IN}_\text{MIN}}}\cdot\left(1+\frac{R_1}{R_{_\text{SPKR}}}\right)$$
So what is the quiescent current when the input signal is at zero volts? Remember \$I_{_\text{Q}}\approx \frac{0\:\text{V}-V_{_\text{EE}}}{R_1}\$? Well, now we can finally answer that question:
$$I_{_\text{Q}}\gt \frac{\vert V_{_{\text{IN}_\text{MIN}}}\vert}{R_{_\text{SPKR}}\: \vert\vert\: R_1}$$
In the case when \$R_1=R_{_\text{SPKR}}\$ then we can write:
The quiescent current must be at least twice as large as the maximum output
current during peaks of the waveform.
This is simply because \$R_1\$ must still be fully able to sink the peak current that can be sourced by the speaker when the NPN emitter isn't itself sourcing. (The NPN cannot sink current, so it cannot be of any help here.)
But let's now get...
Directly to your question
It may appear to you that I've just demonstrated an error. But what I've actually done is to lay the groundwork needed to finally explain the exact wording found in the 3rd edition of The Art of Electronics.
How do we choose a particular value for \$R_1\$? And suppose we choose to increase the value of \$R_1\$? What else must happen then?
Well, as \$R_1\$ increases in value we notice that we have to rapidly increase the magnitude of \$V_{_\text{EE}}\$. So, as \$R_1\to\infty\$ (so that the denominator \$\left(R_{_\text{SPKR}}\, \vert\vert\, R_1\right)\to R_{_\text{SPKR}}\$) then find \$V_{_\text{EE}}\to -\infty\$.
One good thing happens then as we can simplify the equation from the last section and now write:
$$I_{_\text{Q}}\gt \frac{\vert V_{_{\text{IN}_\text{MIN}}}\vert}{R_{_\text{SPKR}}}$$
Note also that when you have an infinitely large voltage rail with an infinitely valued resistor, you have an ideal current source made up by what their ratio approaches. So the authors meant it in the case where there is a current sink located at the emitter of \$Q_1\$ and not a resistor:
simulate this circuit
The authors are strictly correct in their assertion, so long as you are willing to allow \$R_1\to\infty\$. However, you have to think a little bit to see why. But when you do, then you can see that their statement is accurate and has profound implications.
Looking at this behavioral schematic directly above, it's easy to see that when \$Q_1\$'s emitter is no longer sourcing current, then the current sink at the emitter must be able to sink exactly the peak speaker current found anywhere during the negative-going half of the cycle. So long as it can do that much, then the rest can be handled.
Not everything is always handed down to you on a silver platter (as I just did.) Sometimes, you are left to work out the details on your own. And to be honest? That's a good practice to be in (for the rest of your life.)
