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I found this circuit reference online for nRF52810. (Git Source here). The example I used of nRF528210 to make some changes. here

So, the reference Board has this tStrict part: enter image description here

After doing Copper power, the result of the top and bottom layers is something like this in my system: enter image description here enter image description here

The above result shows an error in DRC. I couldn't understand how to fix?

But the PDF example (provided in reference git-source) shows a complete RED patch, it seems completely wrong to me. enter image description here

Can anyone help me fix the drc error for this?

Edited: Software: EAGLE 9.6.2

Just doin Gods work
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  • So the DRC complains because you have traces and parts in what your ECAD (I assume Altium by the looks of it) recognizes as keepout area. So it seems normal that the DRC complains... Why this area was defined in the first place, what purpose it servers and why it seems to be ignored in the example is beyond my ,capabilities to answer. – kruemi Oct 14 '22 at 13:01
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    @kruemi It's EAGLE software. How can I make DRC to know at least I want to keep it this way? – Just doin Gods work Oct 14 '22 at 13:03
  • The keepout is visible in the image on github... – kruemi Oct 14 '22 at 13:04
  • And which is wrong, it should stop the Top Layer to use in that area. – Just doin Gods work Oct 14 '22 at 13:06
  • So basically what you need is a cutout in your polygon pour? Put a polygon on the layer the pour is and set it to cutout in it's properties... and remove the "restrict". – kruemi Oct 14 '22 at 13:09
  • The reason for the problem is probably that this has been converted from altium. It it might have falsely converted a pour cutout to a keepout. – kruemi Oct 14 '22 at 13:11

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A "restrict" area is an area where the correct use requires you to keep away certain other stuff to make things work. Not ALL things (that would be a big hole in the circuit), just some things. Depending on the reason for the restriction, this might only apply to stuff above the PCB or below the PCB or inside the PCB etc. etc. Many PCB design programs (such as Eagle) only understand a few kinds. Such as "top restrict" (tStrict), which may not match what the actual restriction is, thus resulting in wrong error checks (complaining about OK stuff or failing to complain about bad stuff).

In the drawing shown, it is probably just a rule to keep things away from the component in the middle of that area. And that component clearly needs tracks connecting to it, so the restriction should not apply to such tracks. For example the component in the middle may be a light that must be visible, or something hot that needs cool air around it. It might even just be something that is difficult to solder onto the board if there is other stuff getting in your way.

jb_dk
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