1

I designed an ethernet microchip with reference (LAN8742A-LAN8742) with MCU STM32F767ZGT6, so I followed some document routing ethernet in PCB I respect all rules. when I put the ethernet there is a long distance between ethernet PHY and stm32 indicated in the datasheet so I don't need this distance because there's more space.

  1. Do all microchip ethernet references have to smooth the routing distance between the rj45, PHY, and MCU connecter
  2. Please give me another consideration for the ethernet module no space need to route for the design PCB

I used this document for routing
enter image description here


the chip of PHY it's possible to wire near each author doesn't respect the recommendation PCB layout in the datasheet, is it she works? I want to design with this LAN8742A chip with stm32 because all my designs use stm32 I want you to respond to me for this chip LAN8742A with no problem when placement in PCB no respect recommendation datasheet because I need space to add another component and dimension of the board, is a specification

SamGibson
  • 17,231
  • 5
  • 37
  • 58
PCB-ABBS
  • 176
  • 10
  • 5
    "...there is a long distance between ethernet PHY and stm32 indicated in the datasheet" What do you mean by this? Is there a reference that can be added to your question? Also please edit question 2), as it is currently written, I do not understand what you are asking. – Chris Knudsen Aug 15 '22 at 13:55
  • 1
    @walid is there a reason you completely changed the question? – Voltage Spike Aug 17 '22 at 23:40

1 Answers1

0

Do all microchip Ethernet references have to smooth the routing distance between the RJ45, PHY, and MCU connector?

If you want to route 100BaseT you need a differential pair with these characteristics:

The Tx+/Tx- and Rx+/Rx- traces should always be as short as possible (less than 25 mm or 1"). If longer traces are absolutely required, the maximum length is limited to 75 mm (3"). The individual trace impedance of Tx+/Tx- and Rx+/Rx- must be kept below 50 Ω, and the differential characteristic impedance of the pair must be 100 Ω.

Source: Rabbit Technical Note TN266: PCB Layout for the Ethernet PHY Interface

Between the PHY and the microprocessor is the RGMII interface that runs at 50 MHz, so run it like you would run a normal 50 MHz trace.

wovano
  • 161
  • 2
  • 11
Voltage Spike
  • 75,799
  • 36
  • 80
  • 208