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What I am doing is making mPCI-E and mSATA work together in one slot on my Xilinx FPGA. PCIE always only have coupling capacitors on the TX sides(RX sides's capacitors is on the Endpoint Devices), however the SATA have the both. So how should i deal with it or must I use a mux IC?( more budget:( and use two GTX lanes) Sorry for my bad English:(

Zhihao Wang
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  • your English is fine. If it is a production design you'd want to read the relevant specification to determine what is allowed. It could just be convention where the capacitors are placed. The encoding schemes for SATA and PCIe are same or similar (it has been many years since I read the excellent books from Mindshare) so I would guess (someone more knowledgeable is welcome to correct me) that capacitor placement is not too critical. – Kartman Aug 06 '22 at 23:39
  • @Kartman PCIE Endpoint Device already has capacitors. So if I follow the SATA specifications, there are two capacitors in the RXs. – Zhihao Wang Aug 07 '22 at 00:18
  • Yes, I understood this was the problem you were facing. This question might be of assistance: https://electronics.stackexchange.com/questions/514711/why-are-pcies-coupling-capacitors-so-large?rq=1 – Kartman Aug 08 '22 at 23:24

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