I'm a newbie at using Verilog-ams and also I want to write a module for flash ADC for a specific application.
I need to confine my voltages reference so I wrote this Verilog-ams code for testing input allowed value at wreal data type.
I arranged a test bench for my code that the inputs are a sinus voltage with 6 V amplitude and a clock signal for the Sequential circuit in Verilog code. output is an 8-bit signal, consider that is 8-bit-ADC.
as you can see in the first figure below the first change happened at 0.1 volt but it shouldn't happen and then I was expected in the second figure, it change at 1 volt on input in but it didn't happen.
in the end, I don't know what I did here incorrectly.
regards
here is my code