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I couldn't find details of this circuit configuration in an internet search. Most online results are about P-MOSFET in high side path or N-channel MOSFET with charge-pump/IC based driver.

schematic

simulate this circuit – Schematic created using CircuitLab

I understand the high level working of above circuit. It is part of an inrush limiter circuit and would hold the current through M1 constant during C1 charging.

  1. R6 provides the initial path to build up output voltage.
  2. Due to voltage drop across R2, Q1 Vbe crosses the threshold and starts conducting.
  3. This increases the Vgs of M1 and it starts conducting, bypassing R6.
  4. Current through R2 is maintained constant by the feedback effect on Vgs

Why is it not very popular? Any drawbacks for this circuit? What is the purpose of R5?

I could find a similar circuit in another SE answer- but it was with P-channel MOS.

winny
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Divya K.S
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  • M1-G is shorted to GND so it doesn't do anything; did you mean something else? – Tim Williams Jun 13 '22 at 04:11
  • @Tim: Oops! Corrected the circuit – Divya K.S Jun 13 '22 at 04:21
  • It is not very popular because it doesn't work. M1 will never fully turn on, Uds will stay around the threshold voltage of the gate. – Jens Jun 13 '22 at 04:27
  • The circuit is part of a working board. M1 is meant for inrush current limiting and intended to work only initially. There is a bypass path( not shown) once output voltage builds up sufficiently. – Divya K.S Jun 13 '22 at 04:43
  • Are the part numbers for the transistors correct in your schematic, or did you just use the defaults CircuitLab slaps on there? I'm wondering if M1 might be a depletion NMOS on your actual board. – Ste Kulov Jun 13 '22 at 04:59
  • Part number of M1 and Q1 are as per default Circuitlab. Other parts are retained as per the original board. – Divya K.S Jun 13 '22 at 05:12
  • Well then, what are the real part numbers for the transistors? – Ste Kulov Jun 13 '22 at 05:17
  • M1: IPW60R045CPA (Enhancement type) Q1: MMBT2222AT - Updated in schematic as well – Divya K.S Jun 13 '22 at 05:25
  • OK, cool. Thanks. I built up an LTspice simulation using that info to play with it. I don't know if I can answer all your questions, but R5 looks to me like it sets the current through the zener. – Ste Kulov Jun 13 '22 at 06:08
  • Your point 3 doesn't seem right to me. I believe when Q1 starts conducting, it *reduces* \$V_{GS}\$ by pulling the gate *down* towards source potential (which happens when the voltage across R2 is about 7V), in opposition to R5 which pulls the gate high. – Simon Fitch Jun 13 '22 at 11:18
  • As if this circuit has an AC source, it will be much easier to add couple of diodes, resistors and capacitors to get necessary additional positive voltage to reliably open the FET, without any losses. – Vladimir Jun 13 '22 at 11:55

1 Answers1

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Any drawbacks for this circuit?

The circuit will limit the current to around 7V/3R = 2.2A during start up (i.e. charging the output cap). Once the output capacitor charges enough the flowing current will be reduced.

However...

The output voltage of the circuit will be load-dependent: The lower the load resistance (i.e. higher current demand) the lower the output voltage.

The load current plus ripple current will continuously flow through R2 which is a needed element to drop some voltage so that Vgs of the NMOS becomes positive. This continuous flow will bring continuous dissipation. An NMOS is normally used to replace diodes or resistances to reduce the total losses but that R2 on its own zeroes this benefit. This gets worse if the load current demand is high because the network will continuously try to limit the peak currents to 2.2A.

With the help of R2 the Vgs of the NMOS will be positive, because the gate sees full rectified voltage via R5 (100k). But the developed Vgs will be relatively low (in your case less than VZ + VBE = 7V). Driving a power NMOS with very low Vgs will not bring the full low Rds-on advantage due to the lower Vgs. To make Vgs higher R2 should be higher. The higher R2 the higher the loss.

And I'll not mention the continuous loss across R6.

Apart from everything I've talked about above, there's one obvious thing:

  • Without all the circuitry and complexity, the R2 on its own can work as an inrush limiter here - and actually, does most of the heavy lifting. Using a relay which shorts that R2 after a couple of milliseconds after energising the system would be even less expensive and less complex, and easier to implement.
Rohat Kılıç
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