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I'm trying to understand how a voltage doubler using a switched capacitor circuit affects the charge being distributed from the input to the output.

schematic

simulate this circuit – Schematic created using CircuitLab

The circuit operates so that during first phase \$V_{IN}\$ is charging the capacitor \$C_{1}\$ and during second phase the \$C_{1}\$ is connected in series and between \$V_{IN}\$ and \$V_{OUT}\$ and the voltage is doubled. However, theoretically, the maximum output current gets halved.

Now, if current is really halved, does this mean that the charge initially transferred to \$C_{1}\$ halves too (since this relation applies \$Q = I*t\$), or does it stay that same and the time needed to distribute the charge from \$C_{1}\$ to load doubles at the halved current?

P.S.: This might seem a bit weird question but I'm really eager to know the actual answer to this. Also, this has something to do with designing a circuit for charge transfer between battery cells. That is why I'm interested what happens to the amount of charge transferred over to load.

JRE
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Keno
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  • Yes, cell balancing is possible with this method, but the capacitors are larger than inductors at the same power transfer and the peak current in the switches is an efficiency problem. A small inductor in series with the capacitor can help. – Jens Jun 11 '22 at 21:45
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    @Jens Are the high current switching transients the only problem when compared to inductor counterpart for cell balancing? Some research has been put into reducing such transients: https://ieeexplore.ieee.org/document/4443901 – Keno Jun 12 '22 at 08:58
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    @Keno I think I may cover how to approach an analysis [in this prior response on EESE](https://electronics.stackexchange.com/a/612433/38098). +1 on the question! – jonk Jun 12 '22 at 16:28
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    @Keno Unless you use several MHz switching frequency you need electrolytic capacitors of high quality and even these degrade sooner or later. Good conducting switches are a problem here as well. The signal preparation for 4 FET can be a hassle for multiple cell chains. If you just want to compensate different cell leakage currents, an unregulated voltage double charge pump chip will work. – Jens Jun 12 '22 at 16:44
  • @Jens You may want to read the paper (and a number of them that cite it -- it has over 200 citations) that Keno mentioned and see what the authors report with respect to switching frequency. Several of the more important, later papers citing that one are also interesting on the topic of capacitors, Rds, and switching frequencies. Or you may already know this stuff. It's just that mentioning "several MHz" poses a conflict with experimental results reported in what I just spent a few moments skim-reading today. (Assuming I'm able skim-read with understanding, of course. That question remains.) – jonk Jun 12 '22 at 16:58
  • @jonk Thank you for this interesting analysis refreshing my quantitative knowledge. I spent a lot of time with cell balancing designs, came across this approach and discarded it, because I needed up to 10 A transfer current. However, for me it remains as a low cost solution for transfer currents up to 50 mA. – Jens Jun 12 '22 at 18:03
  • @Jens From [my earlier-mentioned answer here](https://electronics.stackexchange.com/a/612433/38098), \$P=\frac{E_{_\text{CYCLE}}}{t_{_\text{CYCLE}}}=f\cdot E_{_\text{CYCLE}}\$ so I completely get your reactions about frequency being proportional to power out. Just practical details I was skimming over today also made me feel a little cautious about over-stating from that idealized perspective. That's all. (Note: \$E_{_\text{CYCLE}}=V_{_\text{OUT}}\cdot\left(2\cdot V_{_\text{CC}}-V_{_\text{OUT}}\right)\cdot C_{_\text{DRIVE}}\$, ideally.) – jonk Jun 12 '22 at 19:54
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    @jonk I will surely go through each section of your answer, as I assume (from previous experiences) that you provided with quality content :) – Keno Jun 13 '22 at 10:04
  • @Jens Not sure (maybe due to lack of experience in such field) whether a capacitor or inductor type of a circuit (maybe a combination of both?) is more appropriate for use as a temporary energy storage? But in principle, it seems there needs to be some form of temporary storage in addition to voltage boost (in order to get sufficient voltage difference between such converter and new cell). – Keno Jun 13 '22 at 10:22
  • @Jens I'm not sure where the 10A for cell balancing came from, to be honest. For case of use of passive balancing in automotive, Infineon offers a [BMS IC](https://www.infineon.com/cms/en/product/battery-management-ics/tle9012dqu/) with discharge current up to 200mA and ADI with [one](https://www.analog.com/en/products/adbms6830.html#product-overview) up to 300 mA. Is 10A meant for cell transfer (not discharge) in case of active balancing? – Keno Jun 13 '22 at 10:22
  • @Keno Yes, I produce active balancers for 2nd life battery packs with up to 300 Ah – Jens Jun 13 '22 at 15:26
  • @Keno That answer does provide what you need to understand about your circuit and how to perform a design that will simulate accurately. And it includes a way to imagine what is going on, as well. Best wishes!! – jonk Jun 13 '22 at 16:34
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    @Keno Sounds to me as though Jens has specific, expert knowledge on the topic and would be able to write up an excellent answer. I could write, but it would feel like copying what I wrote before. If you find something that is still missing when reading that answer, feel free to mention it. Or if you need an LTspice simulation that demonstrates what I wrote delivers quantitative prediction, using ideal switches rather than ideal diodes, that also can be easily shown. – jonk Jun 13 '22 at 16:55
  • @Keno How are things going? Okay? No responses of late.... – jonk Jun 18 '22 at 10:07
  • @jonk Not sure. I was trying to further develop idea of active cell balancing using capacitive methods (using one of switched capacitor topologies) but later realized I probably don't have the appropriate experiences in the waters to further investigate on this matter... – Keno Jun 18 '22 at 14:59
  • @jonk By the way, I'm currently doing internship at very known semiconductor company (BMS department). At some point I got the idea of possible topology for active cell balancing and tried to develop it further. And if I managed to come up with something interesting, I might be able to introduce it to high-ups, which might end up me doing thesis on this matter. However I don't see this happening as we speak, since I'm not "qualified" to proceed developing anything on this matter. – Keno Jun 18 '22 at 14:59
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    @Keno I don't know anything about active cell balancing. I've never looked at the problems related to it (more than a passing glance, anyway.) So I can't offer anything much based on either theory or experience. Wish I knew more. But I don't. There seem to be a lot of recent papers on the topic, though. Perhaps you could start out by mastering what they say, enough that you can fully follow their development. Then come back to your own idea, again? – jonk Jun 20 '22 at 16:39

1 Answers1

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When C1 is switched across V_IN, it consumes current (charge) as it (re)charges.

When C1 switches in series with V_IN (thus doubling it), it also consumes current from V_IN as it (dis)charges and replenishes the load.

Note that current is consumed from V_IN in both states, but (new) charge is delivered to the output only in the 2nd state -- this is the origin of the current halving -- consider that roughly equal currents are consumed in each stage from the input, but only on the 2nd state is current delivered to C2.

jp314
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