Model positive exponential current curve on LTSPICE

Question

I am trying to model the inrush current for a contactor. From the specifications I should get something like this:

The hold current is 0.13A and the inrush current is 3.2A. This is controlled using R3 for the 0.13A and R2 for the latter. Switch SW and SW2 are used to turn the circuit from the inrush part to the hold current part. SW2 at t=0 engages R2 and C1 for 30ms. Then after 30ms SW2 turns off and SW turns on for the remainder of the time thus engaging the hold current resistor of R3.

My circuit is the following:

However, I get the following with the above circuit:

This makes sense since the capacitor's initial condition is set to 0V. However, how do I get the curve to look like the first picture in LTspice?

EDIT 2:

You have a lot of problems, as I skim this. Too many to list out here in comments. Let me start with just one: How do you plan to specify the HOLD current? I see that what you've achieved reaches 0. But I don't where you specify a HOLD current, let alone see any mechanism to achieve it. What's your plan on this single point? (Your first curve shows one, as I read it. And you want us to tell you how to get that curve, as I gather it. What's your plan there? The reason I ask is that the way you get a curve you want is to identify the mechanisms you'll need to achieve it.) — jonk, May 15 '22 at 21:50
@jonk I forget to add the specs. The hold current is 0.13A and the inrush current is 3.2A. This is controlled using R3 for the 0.13A and R2 for the latter. Switch SW and SW2 are used to turn the circuit from the inrush part to the hold current part. SW2 at t=0 engages R2 and C1 for 30ms. Then after 30ms SW2 turns off and SW turns on for the remainder of the time thus engaging the hold current resistor of R3. — JoeyB, May 15 '22 at 22:06
@jonk the capacitor was added to model the exponential part but I need the inverse shape to happen — JoeyB, May 15 '22 at 22:08
Focus on just producing your inrush flat line, via an RC decay, to a hold flat line. Assuming we are talking about the current in a resistor R, what mechanisms could you paste together on paper to get you that? Forget the simulation for now. Just imagine something that causes INRUSH\*R voltage drop across R while \$t\lt t_1\$, causes HOLD\*R voltage drop across R while \$t\gt t_2\$, and causes an RC-like decay when \$t_1\le t\le t_2\$? (Forget all that earlier stuff for now.) Also, what is all this going to get used in, in simulation? That matters a bit, too. Is the load to be grounded? — jonk, May 15 '22 at 22:15
@jonk how do I get the RC like decay? Also I cannot upload the image but at 30ms R3 goes to 0.13A and the RC network goes to 0A. So the current at R1 looks like a straight line at 3.2A, then is decays negatively in an exponentially manner and then settles at 0.13A — JoeyB, May 15 '22 at 22:42
You get it by making sure that the voltage across the resistor follows a decay curve. Suppose you had a separate series RC branch, sitting between two voltages, \$V_x\$ and \$V_y\$, where \$V_y\gt V_x\$ and the capacitor is initially discharged with the other end of the capacitor at \$V_y\$ and the other end of the resistor at \$V_x\$. The shared node of the RC pair would start at \$V_y\$ and then decline along an RC curve towards an eventual \$V_x\$. Right? If you buffered this node voltage and used it to drive your load resistor, what would the load current look like? — jonk, May 15 '22 at 23:21
In my opinion, the best way to handle something like this would be to generate a PWL current source to "draw" out your desired curve. If your curve didn't have that little dip in it, then it might be worth the time doing the whole switching out two emulated loads like you're attempting. If you have access to an oscilloscope capture of the curve, you can convert the CSV data file to have LTspice except it as PWL. If you just have the image you can use something like WebPlotDigitizer. BTW, you should be probing the current through R1, not R2. Also, change your switch's `Ron` to `1m`. — Ste Kulov, May 16 '22 at 00:43
@SteKulov when I probed my R1 in the first attempt circuit I was getting the current at t=0 to be -3.2A then increasing to -130mA around 30ms. Why is it negative and how do I make itgo from 0A at t=0 to 3.2A at 30ms? — JoeyB, May 18 '22 at 22:47
@JoeyB It's an artifact of how SPICE works, where positive current always flows from port-1 to port-2 of the component. Simply use the move tool to pick up your resistor and either rotate it twice via `CTRL-R` or mirror it once via `CTRL-E`. Either method with flip the ports around. You can alternatively add a negative sign to the waveform plots, but it's easier just properly orienting the component once and not having to worry about manually adding in a negative sign every time you probe the current in the future. — Ste Kulov, May 19 '22 at 04:55

Ste Kulov · Answer 1 · 2022-05-19T05:08:01.623

I thought I've give my own suggestion a shot since I never personally tried it, and also give an alternate take on "quick'n'dirty" approaches.

I used WebPlotDigitizer on your extremely low resolution image to generate a dataset. It required a bit of tweaking because if you use your specified 0.13A (hold) and 3.20A (inrush) the curve doesn't cross zero/zero.

I then copied the resultant data into a text file. You gotta sort by ascending X-values so all the time-points are in increasing order.

0, -0.0008914728681936879
0.0004524361948955915, 0.22519379844963439
0.0009396751740139214, 0.4512790697674589
0.0013921113689095129, 0.6595155038759826
0.001948955916473317, 0.8499031007752036
0.0025406032482598604, 1.0283914728682229
0.0030974477958236645, 1.159282945736436
0.003515081206496508, 1.2544767441860447
0.004002320185614849, 1.3139728682170544
0.0044373549883990745, 1.3139728682170535
0.004872389791183289, 1.2187790697674412
0.005168213457076563, 1.0224418604651158
0.005290023201856147, 0.7785077519379824
0.005707656612529001, 0.9807945736434105
0.006090487238979128, 1.1652325581395404
0.006542923433874717, 1.373468992248065
0.0070649651972157735, 1.5817054263565904
0.007708816705336424, 1.825639534883721
0.008387470997679811, 2.081472868217054
0.009309744779582362, 2.3432558139534887
0.010214617169373545, 2.5693410852713177
0.011049883990719253, 2.7597286821705422
0.012006960556844543, 2.938217054263566
0.013068445475638044, 3.063158914728682
0.014234338747099763, 3.158352713178295
0.015330626450116, 3.1940503875968993
0.016392111368909508, 3.2
0.018375870069605563, 3.2
0.02081206496519721, 3.2
0.025440835266821338, 3.2
0.029930394431554506, 3.2
0.03, 2.712131782945736
0.03006960556844547, 2.2123643410852716
0.030174013921113678, 1.8077906976744185
0.03029582366589327, 1.438914728682171
0.03048723897911832, 1.0819379844961237
0.030765661252900228, 0.7725581395348833
0.031183294663573086, 0.4869767441860464
0.03177494199535963, 0.2727906976744183
0.03233178654292342, 0.1894961240310069
0.03295823665893269, 0.15379844961240163
0.03379350348027842, 0.12999999999999723
0.035046403712296975, 0.12999999999999723
0.03609048723897911, 0.12999999999999812
0.03720417633410672, 0.12999999999999812
0.038474477958236636, 0.12999999999999812
0.04028422273781904, 0.12999999999999723

Then in LTspice you can pick a current-source component and in the Advanced dialog select the "PWL FILE" to browse for the file.

Below is the resultant schematic and simulated waveform. If you notice, the last data point was at 40ms but the simulation runs for 50ms. PWL sources will extrapolate that last data point indefinitely, even past the 50ms in my example simulation. So if you simulated this for 1000ms it would keep extending that last point until the end of that simulation too. I added a plot of the voltage at the load (in red) to show the effect of how the load characteristic along with R1 induce a voltage drop causing less than 12V to appear at the load.

Nice, and with enough data points the solver should have minimal glitches (if any). Just one minor thing: R in series with current? Nepotism is not allowed. — a concerned citizen, May 18 '22 at 05:49
@aconcernedcitizen Haha. I just copied the OP's Vth/Rth to show one way to connect it together with what he already had there. I said it was dirty. — Ste Kulov, May 18 '22 at 06:03
@JoeyB It doesn't matter. The current through that branch will be dictated by the current source, so the resistor will not limit anything. A resistor in series with a current source is useless, unless what you need is a different voltage drop. Ste only kept it because you had it in your picture. I omitted it because it doesn't make sense -- which is also why I didn't even bother saying why I omitted it in the first place. — a concerned citizen, May 18 '22 at 17:36
@aconcernedcitizen Like you said, it's useful if you wanna see what kind of voltage gets seen by your component(s) emulated by the current source load, especially during the 3.20A portion where there will be the most drop. — Ste Kulov, May 18 '22 at 18:20
@SteKulov Oh, don't take as a critique, just as an explanation for OP (regarding the differences between the schematics). — a concerned citizen, May 19 '22 at 09:45

score 3 · Accepted Answer · answered May 17 '22 at 11:18

Before I say anything, I am trying to model this based on your first picture, annotated like this:

You say nothing about the first dip (at the first dotted red line), time or value. You also say nothing about the apparent time constant of the underlying curve (seems like a 1st order); the same for the decaying curve. It's not clear what is the hold time, when it should happen, relative to what. So my assumptions are:

it's a 1st order exponential, both the rising and the falling ones, just different time constants;
the first dip is arbitrarily chosen to happen at an arbitrary threshold;
the second rising curve is a continuation of the initial one, which simplifies the design with one RC time constant, only (for the rising part);
the hold time lasts for 5 ms after reaching ~99.9% of the final value;
the decaying curve is not exactly an RC curve, to simplify the design.

With these in mind, if @jonk's or @Ste Kulov's suggestions are not enough, here's a quick'n'dirty attempt:

R1, C1 form an RC time constant that make up the rising curve. R1 is 1 kΩ to keep the current through it from influencing too much the overall result. If this is undesirable, buffer the RC with a VCVS.

Since the input voltage is from 0 to 12 V, the gain of G1, the "front-end", is set to 3.2/12=0.2667, to match the maximum value of 3.2 A.

The threshold for the first dip is chosen at 4 V (corresponding to a current of 3.2*4/12=1.0667 A), when the SR latch A1 turns on. Its output has a time constant which affects S2's transit time, gradually discharging the capacitor, causing the dip to form. Increase or decrease to set the length of the dip's falling edge. S2 has a threshold of 0.5 V and a negative(!) hysteresis of -0.5 V, which means that the whole transition from 0 to 1 of A1 is affecting S2.

S1 takes over at vt=-0.68, relative to A1's output. It's negative because it's meant to start ON and go OFF when active. Its threshold is small and sets the sharpness of the dip. It's best to not make it impossibly low, or even zero, because the lower the value, the higher the internal gain, which can cause "hiccups"; help your local friendly solver, not hinder it. At this point the second rising curve starts.

When the voltage reaches 11.99 V (corresponding to 3.197333 A; be careful with precision, it's not unlimited), the Schmitt trigger A2 turns on and its output has a time constnat of 5 ms. This, in turn, controls S3, whose threshold is -0.693 V, to match the time the output of A2 reaches 0.5 V. S3's hysteresis is, again, small enough, setting the decaying curve's shape. It's not exactly an exp(-t) curve, but it's CloseEnough®™.

S3 acts as an output shunt resistor for G2, and it starts OFF, when roff=1, which means unity gain. When it's ON, ron=40.625m which is 0.13/3.2, the ratio between the hold value and the inrush current.

While it works, it may be a one time deal, since it relies on a latch. It's also triggered by a step input, so no guarantees how it behaves for a ramp, for example, or any other waveform; negative values may cause havoc. If needed, a reset can be provided, either manually (external, or internal), or automatically, at a certain threshold of the hold current, after it has been reached, or after some time has passed (use the equivalent of the A2, for example). The whole circuit activates with the applied voltage, so as long as there is no voltage, no current should be drawn.

Hahaha. What's quick'n'dirty about this? It's like the opposite...I love it. But now you inspired me to show you what true "quick'n'dirty" is all about. — Ste Kulov, May 18 '22 at 04:29
Just out of curiosity. How do I model just a ln exponential increase in current, for example a rise from 0V to 12V from 0A to a max of 3.2A in 30ms, has an example? With my was you would also get the current decreasing across the RC part because has the voltage across the cap increases the current drops. But in your case the current increases. I'm I just probing the wrong place? — JoeyB, May 18 '22 at 16:39
@JoeyB "*just a ln exponential increase*" -- this doesn't make sense: either it's logarithmic, or exponential (aka the inverse of exp() ). If you're referring to the step response of an RC lowpass, then use only `G1, R1, C1` from my exampe, with a \$\tau\$ of 30 ms. Also, whatever lies to the right of `G1` is meant to be a control circuit -- all you need is `V1, G1`, so you have to probe the current through one of those (as you see in my example). What you did and what I did are slightly different approaches (the RC is the only common point). — a concerned citizen, May 18 '22 at 17:30
I see I am confusing exponential with logarithmic functions. Is G1 just a current source? — JoeyB, May 18 '22 at 21:40
@JoeyB In your 2nd edit, is that the same current source that I am using? Did I not say "*use only `G1, R1, C1`*"? It looks like you don't understand some basics, in which case it's best to avoid my example, since it's a bit more involved, because you would then have been able to explain, for yourself, why you got that current and not other. But I can't help wondering, if you don't know these basics, why do you pursue this complicated subject? Not lastly, what *exactly* are you trying to model? — a concerned citizen, May 19 '22 at 09:49
I tried asking what was G1 but I didn't get a response. So I went would what I currently know. This may be basic to yourself but I am trying to learning these "difficult" simulations. Can you explain a bit more on what is G1? You say gain but why do we need a gain and where in ltspice is this because I cannot find it? — JoeyB, May 19 '22 at 21:13
@JoeyB It's not basic to me, it's basic, most elementary knowledge with SPICE. If you don't know this, that is, that the VCCS is part of the primitives and what function does it perform, how on Earth can you hope to even dive into modelling? The whole concept of modelling implies knowing *at the very least* the basics. So, at this point, my very warm recommendation would be to search for a tutorial, not necessarilly LTspice, but SPICE, as a minimum. Otherwise, as you go on forward, you will stumble at every step, and only waste time asking questions, basic or not. IMHO, best learn how to fish. — a concerned citizen, May 20 '22 at 06:25
Thank you for this info. I have recreated my circuit and is found in this POST (https://electronics.stackexchange.com/questions/620594/how-to-get-rid-of-transition-spike-in-lt-spice) — JoeyB, May 22 '22 at 11:44

Model positive exponential current curve on LTSPICE

2 Answers2

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