My input is an FM carrier of 80.00MHz. It is FM modulated with 625kbpsec data. The deviation from carrier is about +/-700kHz. The data never spends more than about 38us in a low state or high state i.e. it is scrambled. Carrier is frequency locked using a PIC and a PLL (ADF4111 from memory but this isn't too important other than to say the varactor that "centres" the frequency is fed from a much slower signal than even the lowest data might produce). Please ask if I've forgotten anything relevant.
The above are all givens.
I'm considering using FM quadrature detection - is this the best choice given that I can't alter the transmitter design (well maybe not this month anyway!!).
EDIT - March 21st - the answer below about counting the cycles stirred thoughts and it provoked me to consider using a high-speed Exclusive or gate as an alternative to the conventional mixer circuit within the heart of the quadrature detector. It would still require a resonant 90º phase shift circuit and simple amplitude limiting so, is this a better choice? Options
- Conventional Quadrature Detector
- Quad detector using an exclusive or gate
- Cycle counting techniques
- A PLL (I've added this but i can't see a decent way of doing it though somebody may)
If one of the above is the best technique, an answer that adequately justifies it gets the nod from me!