The parasitic capacitance of the PCI standard edge connector system is similar to the input capacitance of the ASIC/FPGA that implements the PCI function, and its associated traces.
The PCI slot connector system trades off some performance for low cost and acceptable price-performance ratio.
If you wanted to use non-standard, higher-performance connector systems, you could probably reduce the slot parasitics to 0.3-0.5 of a PCI load, perhaps better if a redriver was used at each slot.
On a parallel PCI bus, you can connect about 10 ASICs directly on the motherboard, with good wiggle room left, whereas 5-6 devices are a maximum if they are on plug-in cards. This informs system design: if you need more than 5-6 devices on the bus, you need to move some of them from the slots to the motherboard, or you need to use more expensive connector systems, or you need to add another PCI bridge.